Yield based, in-line defect sampling method

• US 6,890,775 B2
• Filed: 08/29/2003
• Issued: 05/10/2005
• Est. Priority Date: 08/21/1998
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Simmons, Steven J.
• Primary Examiner(s): Lebentritt, Michael
• Application Number:
  US10/651,665
• Publication Number:
  US 20040054432A1
• Time in Patent Office: 620 Days
• Field of Search: 438/4, 438/7, 438 14- 18, 438/701
• US Class Current: 438/14
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: Y02P 80/30 Reducing waste in manufacturing processes; Calculations of released waste quantities

Abstract

A test method provides a sample of wafer level defects most likely to cause yield loss on a semiconductor wafer subdivided into a plurality of integrated circuits (ICs). Defect size and location data from an inspection tool is manipulated in an algorithm based on defect sizes and geometry parameters. The defects are classified by defect size to form size based populations. The contribution of each size range of defect population to yield loss is calculated and random samples for review are selected from each defect size population. The number of samples from each size defect population is proportional to the predicted yield impact of each sample. The method is rapid and permits on-line process modification to reduce yield losses.

Claims

1. A method for processing semiconductor dice on a wafer comprising:

determining defects on the semiconductor dice on the wafer;

classifying each of the defects by size and location, determining and classifying comprising classifying each of the defects into one of size range populations of defects;

assigning a weight to each of the defects representing an estimated effect of each defect on die yield for the semiconductor dice;

determining an estimated die yield loss (DYL) for each semiconductor die of the semiconductor dice based on number and weight of the defect(s) on each semiconductor die of the semiconductor dice, determining the estimated DYL including calculating an estimated die yield loss having lower and upper limits;

summing all of the DYL of the semiconductor dice on the wafer to obtain a wafer yield loss (WYL);

subdividing the defects into a plurality of size range populations of defects for the semiconductor dice; and

determining a relative contribution of each size range population of defects of the plurality of the semiconductor dice to the wafer yield loss WYL.

2. The method of claim 1, wherein determining the DYL comprises calculating an estimated die yield loss having lower and upper limits of zero and 1.0, respectively.

3. The method of claim 2, wherein the lower limit comprises a representation of no yield loss attributable to the defects and the upper limit comprises a representation of fatal yield loss attributable to the defects.

4. The method of claim 1, wherein subdividing the defects into the plurality of size range populations of defects comprises subdividing the defects into a plurality of 0 to 10 size range populations.

5. A method for semiconductor dice on a wafer comprising:

determining defects on the semiconductor dice on the wafer;

classifying each of the defects by size and location, determining and classifying comprising classifying each of the defects into one of size range populations of defects;

assigning a weight to each of the defects representing an estimated effect of the defects on die yield for the semiconductor dice;

determining an estimated die yield loss (DYL) for each semiconductor die of the semiconductor dice based on number and weight of the defects on each semiconductor die of the semiconductor dice;

summing all DYL of the semiconductor dice on the wafer to obtain a wafer yield loss (WYL);

subdividing the defects into a plurality of size range populations of defects; and

determining a relative contribution of each size range population of defects of the plurality to the WYL, wherein determining the relative contribution of each size range population of defects of the plurality to the wafer yield loss comprises;

discarding data for each size range population of defects of the plurality and calculating, in turn, a drop in the WYL for combined size range populations excepting the discarded data;

summing the calculated WYL to obtain a drop sum;

dividing the drop sum to determine a relative drop attributable to each size range population of defects of the plurality; and

randomly selecting defects from each size range population of defects of the plurality.

6. The method of claim 5, further comprising:

randomly selecting defects from each size range population of defects of the plurality, a number selected from each size range population of defects of the plurality in proportion to the relative contribution thereof, the randomly selected defects being weighted to represent defects having a greatest effect on yield losses.

7. The method of claim 6, further comprising:

reviewing the randomly selected defects and determining in-line action required to reduce wafer yield losses.

8. The method of claim 7, wherein reviewing the randomly selected defects includes visual inspection by a microscope.

9. The method of claim 7, wherein determining in-line action comprises determining if an individual semiconductor die of the semiconductor dice on the wafer is acceptable to proceed in a manufacturing process.

10. The method of claim 5, wherein determining defects on the semiconductor dice is performed by an automated surface inspection tool.

11. A method for semiconductor dice in wafer form comprising:

determining defects of the semiconductor dice;

classifying each of the defects by size and location;

assigning a weight to each of the defects representing an estimated effect of each defect on die yield;

determining an estimated die yield loss (DYL) for each of the semiconductor dice based on number and weight of the defects on each of the semiconductor dice;

summing all DYL of the semiconductor dice on the wafer to obtain a wafer yield loss (WYL);

subdividing the defects into a plurality of size range populations of defects;

determining a relative contribution of each size range population of defects of the plurality to the WYL;

randomly selecting defects from each size range population of defects of the plurality, a number selected from each size range population of defects of the plurality in proportion to the relative contribution thereof, the randomly selected defects weighted to represent defects having a greatest effect on yield losses; and

reviewing the randomly selected defects.

12. The method of claim 11, further comprising:

reviewing the randomly selected defects and determining in-line action required to reduce the WYL.

13. The method of claim 11, wherein determining defects and classifying each of the defects comprises classifying each of the defects into one of the plurality of size range populations of defects.

14. The method of claim 11, wherein determining the DYL comprises calculating an estimated die yield loss having lower and upper limits of zero and 1.0, respectively.

15. The method of claim 14, wherein the lower limit comprises a representation of no yield loss attributable to the defects and the upper limit comprises a representation of fatal yield loss attributable to the defects.

16. The method of claim 11, wherein subdividing the defects into the plurality of size range populations of defects comprises subdividing the defects into a plurality of 0 to 10 size range populations.

17. The method of claim 11, wherein determining the relative contribution of each size range population of defects of the plurality to the WYL comprises:

discarding data for each size range population of defects of the plurality and calculating, in turn, a drop in WYL for combined size range populations excepting the discarded data;

summing the calculated drop in WYL to obtain a drop sum; and

dividing the drop sum to determine a relative drop attributable to each size range population of defects of the plurality.

18. The method of claim 12, wherein determining in-line action required to reduce the WYL comprises determining if an individual semiconductor die of the semiconductor dice in wafer form is acceptable to proceed in a manufacturing process.