Low power analog to digital converter
First Claim
1. An analog to digital converter for converting an analog signal into a digital signal, comprising:
- an input circuit;
a reference circuit for generating a series of reference signals;
a first converter connected to said imput circuit and said reference circuit for comparing said input signal to said reference signals for determining the most significant digital value of said input signal; and
a second converter connected to said input circuit and said reference circuit and said first converter, said second converter further comprising a charge sharing pipelined chain converter for comparing said input signal to said reference signals for determining the least significant digital value of said input signal;
wherein said input circuit includes a sample and hold circuit for storing the input signal during the period said first converter is determining the most significant digital value of said input signal; and
said sample and hold circuit storing the input signal during the period said second converter is determining the least significant digital value of said input signal.
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Accused Products
Abstract
An improved analog to digital converter is disclosed incorporating a flash converter and a charge-sharing pipelined chain converter. The invention incorporates three important circuits including a novel voltage reference steering circuit, a novel high performance low power comparator circuit and a novel digital calibration for compensation circuit. The low power is accomplished by turning on compare circuits only when comparing (controlled by timing circuits that are common to all comparators) and by a low power RAM that properly aligns the converted data. The converter operates in a pipelined manor and requires multiple sample and hold circuits for the compare circuits. The improved analog to digital converter incorporates test and calibration to compensate for variations experience during operation and manufacture of the improved analog to digital converter.
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Citations
17 Claims
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1. An analog to digital converter for converting an analog signal into a digital signal, comprising:
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an input circuit;
a reference circuit for generating a series of reference signals;
a first converter connected to said imput circuit and said reference circuit for comparing said input signal to said reference signals for determining the most significant digital value of said input signal; and
a second converter connected to said input circuit and said reference circuit and said first converter, said second converter further comprising a charge sharing pipelined chain converter for comparing said input signal to said reference signals for determining the least significant digital value of said input signal;
wherein said input circuit includes a sample and hold circuit for storing the input signal during the period said first converter is determining the most significant digital value of said input signal; and
said sample and hold circuit storing the input signal during the period said second converter is determining the least significant digital value of said input signal. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An improved compensation circuit for improving the accuracy of an operating circuit, comprising:
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an array of capacitors for generating a variable binary internal signal to provide a wide range of compensation for the operating circuit;
an array of memories;
an array of switches interconnecting said array of capacitors to said array of memories; and
said array of switches interconnecting selective capacitors of said array of capacitors to selected memories of said array of memories for improving the accuracy of an operating circuit. - View Dependent Claims (8)
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9. An analog to digital converter for converting an analog signal into a digital signal, comprising:
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an input circuit;
a reference circuit for generating a series of reference signals;
a first converter connected to said input circuit and said reference circuit for comparing said input signal to said reference signals for determining the most significant digital values of said input signal; and
a second converter connected to said input circuit and said reference circuit and said first converter, said second converter further comprising a charge sharing pipelined chain converter for comparing said input signal to said reference signals for determining the least significant digital value of said input signal. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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Specification