Method and apparatus for performing extraction using a model trained with Bayesian inference via a Monte Carlo method

• US 6,892,366 B1
• Filed: 01/31/2002
• Issued: 05/10/2005
• Est. Priority Date: 08/28/2001
• Status: Expired due to Term

• Current Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Original Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Inventors: Teig, Steven, Chatterjee, Arindam
• Primary Examiner(s): Siek, Vuthe
• Application Number:
  US10/066,326
• Time in Patent Office: 1,195 Days
• Field of Search: 716 1- 21, 703 13- 17, 706/25, 706/33, 706/45, 706/60, 706/61, 700/49
• US Class Current: 716/115
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

A system for using machine learning based upon Bayesian inference using a hybrid monte carlo method to create a model for performing integrated circuit layout extraction is disclosed. The system of the present invention has two main phases: model creation and model application. The model creation phase comprises creating one or more extraction models using machine-learning techniques. First, a complex extraction problem is decomposed into smaller simpler extraction problems. Then, each smaller extraction problem is then analyzed to identify a set of physical parameters that fully define the smaller extraction problem. Next, complex mathematical models are created using machine learning techniques for all of the smaller simpler extraction problems. The machine learning is performed by first creating training data sets composed of the identified parameters from typical examples of the smaller extraction problem and the answers to those example extraction problems as solved using a highly accurate physics-based field solver. Next, the system uses Bayesian inference implemented with a Monte Carlo method to train a set of neural networks for extraction problems. After the creation of a set of models for each of the smaller simpler extraction problems, the machine-learning based models may be used for extraction.

Claims

1. A method of extracting electrical characteristics from an integrated circuit layout, said method comprising:

dividing said integrated circuit layout into at least one extraction sub problem;

identifying a set of physical parameters that define said extraction sub problem from said integrated circuit layout;

supplying said set of physical parameters to a machine-learning model trained for said extraction sub problem with Bayesian inference implemented with a Monte Carlo method; and

calculating at least one electrical characteristic for said extraction sub problem by analyzing said set of physical parameters with said machine-learning model trained with Bayesian inference implemented with a Monte Carlo method.

2. The method as claimed in claim 1 wherein said electrical characteristic comprises capacitance.

3. The method as claimed in claim 1 wherein said electrical characteristic comprises resistance.

4. The method as claimed in claim 1 wherein said extraction sub problem comprises a net in said integrated circuit la out.

5. The method as claimed in claim 1 wherein said extraction sub problem comprises a section of interconnect wiring in said integrated circuit layout.

6. The method as claimed in claim 1 wherein one of said set of physical parameters comprises a distance between a pair of interconnect lines in said integrated circuit layout.

7. The method as claimed in claim 1 wherein one of said set of physical parameters comprises an interconnect wire width in said integrated circuit layout.

8. The method as claimed in claim 1 wherein one of said set of physical parameters comprises an interconnect wire length in said integrated circuit layout.

9. The method as claimed in claim 1, said method further comprising:

selecting said machine-learning model from a plurality of machine-learning models.

10. The method as claimed in claim 1 wherein calculating at least one electrical characteristic for said extraction sub problem comprises:

determining a capacitance per unit length for a subsection of interconnect wiring in said integrated circuit layout; and

multiplying said capacitance per unit length by a length of said subsection of interconnect wiring in said integrated circuit layout.

11. A computer readable medium, said computer readable medium comprising an arranged set of computer instructions for:

dividing an integrated circuit layout into at least one extraction sub problem;

identifying a set of physical parameters that define said extraction sub problem from said integrated circuit layout;

supplying said set of physical parameters to a machine-learning model trained for said extraction sub problem with Bayesian inference implemented with a Monte Carlo method; and

calculating at least one electrical characteristic for said extraction sub problem by analyzing said set of physical parameters with said machine-learning model trained with Bayesian inference implemented with a Monte Carlo method.

12. The computer readable medium as claimed in claim 11 wherein said electrical characteristic comprises capacitance.

13. The computer readable medium as claimed in claim 11 wherein said electrical characteristic comprises resistance.

14. The computer readable medium as claimed in claim 11 wherein said extraction sub problem comprises a net in said integrated circuit layout.

15. The computer readable medium as claimed in claim 11 wherein said extraction sub problem comprises a section of interconnect wiring in said integrated circuit layout.

16. The computer readable medium as claimed in claim 11 wherein one of said set of physical parameters comprises a distance between a pair of interconnect line in said integrated circuit layout s.

17. The computer readable medium as claimed in claim 11 wherein one of said set of physical parameters comprises an interconnect wire width in said integrated circuit layout.

18. The method as claimed in claim 11 wherein one of said set of physical parameters comprises an interconnect wire length in said integrated circuit layout.

19. The computer readable medium as claimed in claim 11 wherein said arranged set of computer instructions further perform:

selecting said machine-learning model trained for said extraction sub problem model from a plurality of machine-learning models.

20. The computer readable medium as claimed in claim 11 wherein a subset of computer instructions for calculating at least one electrical characteristic for said extraction sub problem perform the follow:

determining a capacitance per unit length for a subsection of interconnect wiring in said integrated circuit layout; and

multiplying said capacitance per unit length by a length of said subsection of interconnect wiring in said integrated circuit layout.