L-shaped spacer incorporating or patterned using amorphous carbon or CVD organic materials

• US 6,893,967 B1
• Filed: 01/13/2004
• Issued: 05/17/2005
• Est. Priority Date: 01/13/2004
• Status: Active Grant

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Wright, Marilyn I., Bonser, Douglas J., You, Lu, Hellig, Kay
• Primary Examiner(s): Wojciechowicz, Edward
• Application Number:
  US10/755,911
• Time in Patent Office: 490 Days
• Field of Search: 438/691, 438/692, 438/694, 257/333, 257/401
• US Class Current: 438/691
• CPC Class Codes: H01L 29/6656 using multiple spacer layers, e.g. multiple sidewall spacers

Abstract

A multilayer L-shaped spacer is formed of a lower portion comprising a CVD organic material or amorphous carbon, and an upper portion comprised of a protective material. The upper portion is patterned using a photoresist mask. During that patterning, the underlying substrate is protected by a layer of CVD organic material or amorphous carbon. The CVD organic material or amorphous carbon is then patterned using the patterned protective material as a mask. The chemistry used to pattern the CVD organic material or amorphous carbon is relatively harmless to the underlying substrate. Alternatively, an L-shaped spacer is patterned without using a photoresist mask by forming an amorphous carbon spacer around a gate that is covered with a conformal layer of a conventional spacer material. The conventional spacer material is patterned using the amorphous carbon spacer as an etch mask. The amorphous carbon spacer is easily formed without the need for lithographic patterning, and therefore this method is preferable to methods using photoresist masks.

Claims

1. A process performed during manufacture of a semiconductor device, comprising:

providing a substrate having formed thereon a gate structure including a gate insulator formed on the substrate and a gate line formed over the gate insulator;

forming a conformal layer of a spacer material over the substrate and the gate structure, the spacer material being one of amorphous carbon and a CVD organic material;

forming a conformal layer of a protective material over the spacer material;

patterning the protective material using a photoresist mask to define an upper portion of an L-shaped spacer; and

removing the photoresist mask and spacer material unprotected by the upper portion of the L-shaped spacer to form a lower portion of the L-shaped spacer.

2. The method claimed in claim 1, wherein the protective material is one of silicon oxide, silicon oxynitride, TEOS oxide, silicon rich nitride, and silicon rich oxide.

3. The method claimed in claim 1, further comprising implanting deep portions of the source and drain regions adjacent to the gate structure using the L-shaped spacer as an implant mask.

4. The method claimed in claim 1, further comprising forming silicided source and drain contacts for source and drain regions adjacent to said gate structure, wherein the L-shaped spacer prevents shorting of the silicided source and drain contacts to the gate line.

5. The method claimed in claim 1, wherein said removing is performed using an ashing process.

6. The method claimed in claim 1, wherein said removing is performed using a photoresist wet clean process.

14. The method claimed in claim 1, wherein patterning the protective material defines an L-shaped upper portion of the L-shaped spacer, and

wherein removing the spacer material unprotected by the upper portion of the L-shaped spacer forms a lower L-shaped portion of the L-shaped spacer.

15. The method claimed in claim 1, wherein the L-shaped spacer extends over a top surface of the gate line.

16. The method claimed in claim 1, wherein the photoresist mask and the unprotected spacer material are removed concurrently.

7. A process performed during manufacture of a semiconductor device, comprising:

providing a substrate having formed thereon a gate structure including a gate insulator formed on the substrate and a gate line formed over the gate insulator;

forming a conformal layer of a spacer material over the substrate and the gate structure;

forming a conformal layer of amorphous carbon over the layer of spacer material;

anisotropically etching the amorphous carbon layer to form an amorphous carbon spacer around the gate structure; and

patterning the protective layer using the amorphous carbon spacer as a hardmask to define an L-shaped spacer.

8. The method claim 7, wherein the spacer material is one of silicon oxide, silicon oxynitride, TEOS oxide, silicon rich nitride, and silicon rich oxide.

9. The method claimed in claim 7, further comprising removing the amorphous carbon spacer.

10. The method claimed in claim 9, wherein said removing is performed using an ashing process.

11. The method claimed in claim 9, wherein said removing is performed using a photoresist wet clean process.

12. The method claimed in claim 7, further comprising implanting deep portions of the source and drain regions adjacent to the gate structure using the L-shaped spacer as an implant mask.

13. The method claimed in claim 7, further comprising forming silicided source and drain contacts for source and drain regions adjacent to said gate structure, wherein the L-shaped spacer prevents shorting of the silicided source and drain contacts to the gate line.