Scaleable integrated data processing device
First Claim
1. A scaleable integrated data processing device, provided on a carrier substrate, comprising a processing unit having one or more processors, and a storage unit having one or more memories,wherein the data processing device comprises mutually adjacent, substantially parallel stacked layers and the processing unit and the storage unit are provided in one or more of the substantially parallel stacked layers, wherein each of the substantially parallel stacked layers comprises one or more processors and/or one or more memories, and electrical conducting structures which form internal electrical connections in the layer, wherein each substantially parallel stacked layer is formed of a plurality of sublayers, having delimited portions which form dielectric, semiconducting or electrical conducting areas in the sublayer and the sublayer, in addition to at least one dielectric portion, having one or more semiconducting and/or electrical conducting portions, wherein delimited portions with a given electrical property in each sublayer are provided in a registering relationship to one or more corresponding portions in at least one of the adjacent neighbor sublayers to form integrated circuit elements which extend vertically through one or more sublayers, wherein the electrical conducting structures are formed by the electrical conducting portions in the sublayer and respectively extend horizontally in order to create horizontal electrical conducting structures or are provided in registering connection with corresponding electrical conducting portions in one or more adjacent sublayers, such that the electrical conducting structures integrated in the sublayers form three-dimensional electrical interconnecting networks in the layers and interconnect the circuit elements therein mutually in three dimensions, and wherein additional electrical conducting structures in the data-processing device interconnect the layers mutually and/or the layers with the substrate and in order to create a connection to the exterior of the data processing device.
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Accused Products
Abstract
A scaleable integrated data processing device, particularly a microcomputer, comprises a processing unit with one or more processors and a storage unit with one or more memories. The data processing device is provided on a carrier substrate (S) and comprises mutually adjacent substantially parallel layers (P, M, MP) stacked up on each other, the processing unit and the storage unit being provided in one or more such layers and the separate layers formed with a selected number of processors and memories in selected combinations. In each layer are provided horizontal electrical conducting structures which constitute electrical internal connections in the layer and besides each layer comprises further electrical conducting structures which provide electrical connections to other layers and to the exterior of the data processing device. The integrated data processing device has a scaleable architecture, such that it in principle can be configured with an almost unlimited processor and memory capacity. Particularly can the data processing device implement various forms of scaleable parallel architectures integrated with optimal interconnectivity in three dimensions.
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Citations
31 Claims
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1. A scaleable integrated data processing device, provided on a carrier substrate, comprising a processing unit having one or more processors, and a storage unit having one or more memories,
wherein the data processing device comprises mutually adjacent, substantially parallel stacked layers and the processing unit and the storage unit are provided in one or more of the substantially parallel stacked layers, wherein each of the substantially parallel stacked layers comprises one or more processors and/or one or more memories, and electrical conducting structures which form internal electrical connections in the layer, wherein each substantially parallel stacked layer is formed of a plurality of sublayers, having delimited portions which form dielectric, semiconducting or electrical conducting areas in the sublayer and the sublayer, in addition to at least one dielectric portion, having one or more semiconducting and/or electrical conducting portions, wherein delimited portions with a given electrical property in each sublayer are provided in a registering relationship to one or more corresponding portions in at least one of the adjacent neighbor sublayers to form integrated circuit elements which extend vertically through one or more sublayers, wherein the electrical conducting structures are formed by the electrical conducting portions in the sublayer and respectively extend horizontally in order to create horizontal electrical conducting structures or are provided in registering connection with corresponding electrical conducting portions in one or more adjacent sublayers, such that the electrical conducting structures integrated in the sublayers form three-dimensional electrical interconnecting networks in the layers and interconnect the circuit elements therein mutually in three dimensions, and wherein additional electrical conducting structures in the data-processing device interconnect the layers mutually and/or the layers with the substrate and in order to create a connection to the exterior of the data processing device.
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17. A data processing device, comprising:
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a carrier substrate; and
a plurality of main layers formed above the carrier-substrate, wherein each main layer is one of a processor layer, a memory layer, or a combination layer, and wherein at least one main layer includes logic devices formed from organic materials. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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Specification