Data control device and an ATM control device
First Claim
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1. A data control device for controlling operations on data, comprising:
- attribute analyzing means for analyzing an attribute of data;
a main memory for storing setting information of the data in a region corresponding to the attribute; and
a plurality of data processing means each including a highway cache memory for storing the data, said highway cache memory receiving and transmitting the data on a highway, a processor for performing an operation on the data in accordance with the setting information, and a data cache memory interposed between said processor and said main memory and storing the setting information, said plurality of data processing means subjecting the data to a plurality of stages of pipeline processing, wherein said data cache memory includes read means for reading the setting information from said main memory and storing the setting information, operation information storage means accessed by said processor and storing the setting information and a results of operation, and write-back means for writing the operation result back into said main memory as the setting information , and said read means, said operation information storage means and said write-back means perform parallel processing independently of one another.
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Abstract
A data control device capable of high-quality, high-efficiency control for speeding up data processing, thus permitting improvement of the throughput of a system. Attribute analyzing unit analyzes an attribute of data, and a main memory stores setting information of the data in a region corresponding to the attribute. A highway cache memory stores the data, and also receives and transmits the data on a highway. A processor performs an operation on the data in accordance with the setting information. A data cache memory is interposed between the processor and the main memory and stores the setting information.
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Citations
18 Claims
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1. A data control device for controlling operations on data, comprising:
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attribute analyzing means for analyzing an attribute of data;
a main memory for storing setting information of the data in a region corresponding to the attribute; and
a plurality of data processing means each including a highway cache memory for storing the data, said highway cache memory receiving and transmitting the data on a highway, a processor for performing an operation on the data in accordance with the setting information, and a data cache memory interposed between said processor and said main memory and storing the setting information, said plurality of data processing means subjecting the data to a plurality of stages of pipeline processing, wherein said data cache memory includes read means for reading the setting information from said main memory and storing the setting information, operation information storage means accessed by said processor and storing the setting information and a results of operation, and write-back means for writing the operation result back into said main memory as the setting information , and said read means, said operation information storage means and said write-back means perform parallel processing independently of one another. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An ATM control device for controlling ATM communications, comprising:
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attribute analyzing means for analyzing an attribute of a cell;
a main memory for storing setting information of the cell in a region corresponding to the attribute; and
a plurality of cell processing means each including a highway cache memory for storing the cell, said highway cache memory receiving and transmitting the cell on a highway, a processor for performing an operation on the cell in accordance with the setting information, and a cell cache memory interposed between said processor and said main memory and storing the setting information, said plurality of cell processing means subjecting the cell to a plurality of stages of pipeline processing, wherein said cell cache memory includes read means for reading the setting information from said main memory and storing the setting information, operation information storage means accessed by said processor and storing the setting information and a result of operation, and write-back means for writing the operation result back into said main memory as the setting information, and said read means, said operation information storage means and said write-back means perform parallel processing independently of one another. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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Specification