Memory addressing for a virtual machine implementation on a computer processor supporting virtual hash-page-table searching

• US 6,895,491 B2
• Filed: 09/26/2002
• Issued: 05/17/2005
• Est. Priority Date: 09/26/2002
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Ross, Jonathan, Kjos, Todd, de Dinechin, Christophe
• Primary Examiner(s): Sparks, Donald
• Assistant Examiner(s): Dinh, Ngoc V
• Application Number:
  US10/260,645
• Publication Number:
  US 20040064668A1
• Time in Patent Office: 964 Days
• Field of Search: 711/6, 711/200, 711/202, 711/203, 711/205, 711/207
• US Class Current: 711/203
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 12/1036 for multiple virtual address spaces, e.g. segmentation G06F12/1045 takes precedence
• CPC Class Codes: G06F 12/145 the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism

Abstract

A software monitor, interposed between the hardware layer of a computer system and one or more guest operating systems, constructs and maintains a guest-physical-address-to-host-physical-address map for each guest operating system, and maintains a virtual memory addressing context for each guest operating system that may include a virtual-hash-page table for each guest operating system, the contents of translation registers for each guest operating system, CPU-specific virtual-memory translations for each guest operating system, and the contents of various status registers. The monitor runs at the highest privilege level provided by the hardware system, intercepting attempts to execute privileged instructions by guest operating systems, and simulates or enhances certain of the privileged instructions related to virtual-memory addressing in order to construct and maintain the guest-physical-address-to-host-physical-address map and to provide each guest operating system with the illusion that the guest operating system is executing as the most privileged process on a virtual machine.

Claims

1. A method for efficiently translating virtual-memory addresses to physical-memory addresses in a computer system serving as a platform for execution of a number of guest operating systems, the method comprising:

providing a monitor;

partitioning a machine-architecture-supplied virtual-address space into separate virtual-address-space partitions for use by the guest operating systems and the monitor, each virtual-address-space partition used by one of a guest operating system or the monitor;

running the monitor at a privilege level more privileged than any privilege level at which a guest operating system runs; and

intercepting, by the monitor, attempts by the guest operating systems to execute virtual-memory related instructions in order to

create and maintain a guest-physical-address-to-host-physical-address map for each guest operating system; and

translate guest-virtual-memory addresses, within a virtual-address-space partition allocated by the monitor to the guest operating system, to host physical addresses.

2. The method of claim 1 wherein the monitor provides a virtual machine to each guest operating system.

3. The method of claim 1 further including partitioning a machine-architecture-supplied virtual-address space into virtual-address-space partitions by partitioning a range of region identifiers provided by the host processor architecture into region-identifier-subrange partitions, each region-identifier-subrange partition used by one:

of a guest operating system; and

the monitor.

4. The method of claim 3 further including partitioning a range of region identifiers provided by a processor architecture into a number of smaller region-identifier-subrange partitions, wherein the range of region identifiers is encoded in a first number of bits, n₁, and the smaller region-identifier-subranges are encoded in a smaller, second number of bits, n₂, providing 2^(n1-n2) smaller region-identifier-subranges.

5. The method of claim 1 further including partitioning virtual memory into partitions accessible to the monitor and a guest operating system and into partitions accessible only to the monitor by partitioning a range of protection keys provided by a processor architecture into protection-key-subrange partitions.

6. The method of claim 5 further including partitioning the range of protection keys provided by the processor architecture into a number of smaller protection-key partitions, wherein the range of protection keys is encoded in a first number of bits, n₁, and the smaller protection-key-subranges are encoded in a smaller, second number of bits, n₂, providing 2^(n1-n2) smaller protection-key-subranges.

7. The method of claim 6 further including replacing a guest-operating-system protection key, associated with a virtual-memory page, with a corresponding monitor protection key by the monitor in order to intercept, by the monitor, guest-operating-system access to the virtual-memory page.

8. The method of claim 1 further including writing, by the monitor, a region identifier reserved for guest-operating-system-physical-addressing-mode operation into a region register when a guest operating system enables physical-mode operation.

9. The method of claim 1 further including maintaining, by the monitor, a separate virtual page table for each guest operating system, allowing for machine-level translation-cache and virtual-page-table searching for virtual-address translations.

10. The method of claim 1, when the monitor can'"'"'t resolve a memory fault, resolving the memory fault by the guest operating system by the monitor.

11. The method of claim 1 further including:

identifying, as replaceable instructions, non-privileged instructions that execute differently when executed by a process running at the most privileged privilege level and when executed by a process running at a lower privilege level; and

when a guest operating system, running at guest-operating-system-kernel privilege, attempts to execute a memory page that includes a replaceable instruction, scanning the memory page and replacing replaceable operations with branch instructions directed to monitor code.

12. The method of claim 11 further including:

replacing the guest-operating-system-assigned protection key associated with the memory page with a monitor protection key, so that subsequent access to the memory page by the guest operating system results in a key-permission fault that is intercepted by the monitor.

13. The method of claim 12 further including:

upon intercepting a key-permission fault resulting from an attempt by the guest operating system to access the memory page, restoring the original, replaceable instructions prior to allowing the guest operating system to access the memory page.

14. The method of claim 11 wherein, when more than one virtual-memory address is associated with the memory page, physically aliasing the memory page by copying the memory page to another memory page.

15. The method of claim 1 further including:

identifying, as access-rights modifiable memory pages, those memory pages with associated original access rights that, when accessed by a guest operating system running at a guest-kernel privilege level, result in access rights different from the access rights that would be provided to a process running at the most privileged privilege level by the original access rights; and

replacing the access rights associated with the memory pages with substitute access rights that provide access rights to the guest operating system running at a guest-kernel privilege level that would be provided to a process running at the most privileged privilege level by the original access rights.

16. The method of claim 1 further including translating a guest-operating-system virtual-memory address to a host-physical address by:

when the guest virtual-memory address is found in a hardware translation cache, returning a corresponding host-physical address from the hardware translation cache;

when the guest virtual-memory address is not found in the hardware translation cache, but is found in a hardware-referenced virtual hash page table, returning a corresponding host-physical address from the hardware-referenced virtual hash page table; and

when the guest virtual-memory address is found neither in the hardware translation cache nor in the hardware-referenced virtual hash page table,

when the guest virtual-memory address is found in one of a virtual translation cache or a guest virtual hash page table maintained for the guest operating system by the monitor, returning a host physical address corresponding to a guest physical address found in one of the virtual translation cache or guest virtual hash page table, and

when the guest virtual-memory address is found in neither the virtual translation cache nor the guest virtual hash page table maintained for the guest operating system by the monitor,

passing a translation-cache-miss fault to a guest operating system,

resolving the guest virtual-memory address to a guest physical address by the guest operating system, and

returning a host physical address corresponding to the guest physical address.

17. The method of claim 1 further including:

when a guest operating system attempts to execute a privileged instruction, intercepting the attempted execution by the monitor through a privileged-instruction fault and replacing the privileged instruction with a branch instruction directed to monitor code.

18. A computer system that serves as a platform for executing a number of guest operating systems and that efficiently translates virtual-memory addresses to physical addresses on behalf of guest operating systems by the method of claim 1.

19. A computer readable medium containing computer instructions for carrying out the method of claim 1.

20. Electronic signals embodied in a carrier wave that encode computer instructions for carrying out the method of claim 1.

21. A monitor and hardware computer system comprising:

one or more processors that provide multiple privilege levels, translation caches, and machine-support for searching translation caches and virtual page tables;

system memory; and

a monitor that runs within the computer system at a privilege level more privileged than any privilege levels at which guest operating systems run within the computer system, the monitor

partitioning virtual-address space into partitions, each partition used by one of the monitor or a guest operating system;

constructing and maintaining a map for each guest operating system containing indications of host physical memory pages corresponding to guest-operating-system virtual physical memory pages; and

substituting host physical addresses for guest virtual physical addresses in translation caches and virtual page tables so that machine-level virtual-address-translation features of the computer system, including translation-cache and virtual-page-table searches, can be carried out on behalf of the guest operating systems.