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Semiconductor process and integrated circuit having dual metal oxide gate dielectric with single metal gate electrode

  • US 6,897,095 B1
  • Filed: 05/12/2004
  • Issued: 05/24/2005
  • Est. Priority Date: 05/12/2004
  • Status: Expired due to Term
First Claim
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1. A semiconductor fabrication process, comprising:

  • forming a first gate dielectric over and in contact with a well region and a second gate dielectric over and in contact with a second well region wherein the compositions of the first and second gate dielectric are different; and

    forming a first gate electrode over and in contact with the first gate dielectric and a second gate electrode over and in contact with the second gate dielectric wherein the first and second gate electrodes are equivalent in composition and thickness;

    wherein the first gate dielectric includes a second dielectric film overlying a first dielectric film on an upper surface of the first well region and wherein the second gate dielectric includes a third dielectric film overlying the first dielectric film on the upper surface of the second well region.

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