Capacitor for high performance system-on-chip using post passivation device

• US 6,897,507 B2
• Filed: 11/25/2002
• Issued: 05/24/2005
• Est. Priority Date: 12/21/1998
• Status: Expired due to Term

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Megic Corporation (Chipbond Technology Corporation)
• Inventors: Lin, Mou-Shiung
• Primary Examiner(s): Whitehead, Jr., Carl
• Assistant Examiner(s): HUYNH, YENNHU B
• Application Number:
  US10/303,451
• Publication Number:
  US 20030071326A1
• Time in Patent Office: 911 Days
• Field of Search: 257/300, 257/383, 257/471, 257/435, 257773-775, 257755-759, 257/485, 257/483, 438/250, 438/393, 438/92, 438/167, 438/510, 438/618, 438/666
• US Class Current: 257/300
• CPC Class Codes: H01L 21/768 Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
• CPC Class Codes: H01L 21/76807 for dual damascene structures
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/13022 the bump connector being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 23/3192 Multilayer coating
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/5228 Resistive arrangements or effects of, or between, wiring layers other resistive arrangements H01L23/647
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 23/5329 Insulating materials
• CPC Class Codes: H01L 23/53295 Stacked insulating layers
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 23/642 : Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 23/645 : Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 23/647 : Resistive arrangements H01L23/66, H01L23/62 take precedence
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 27/0676 : comprising combinations of diodes, or capacitors or resistors
• CPC Class Codes: H01L 27/08 : including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 : Inductors
• CPC Class Codes: H01L 28/20 : Resistors
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01011 : Sodium [Na]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01038 : Strontium [Sr]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01084 : Polonium [Po]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/05042 : Si3N4
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1423 : Monolithic Microwave Integrated Circuit [MMIC]
• CPC Class Codes: H01L 2924/15174 : in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/19015 : including thin film passive components
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19104 : on the semiconductor or solid-state device, i.e. passive-on-chip
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: Y10S 257/92 : Conductor layers on different levels connected in parallel, e.g. to reduce resistance

Abstract

The present invention extends the above referenced continuation-in-part application by in addition creating high quality electrical components, such as inductors, capacitors or resistors, on a layer of passivation or on the surface of a thick layer of polymer. In addition, the process of the invention provides a method for mounting discrete electrical components at a significant distance removed from the underlying silicon surface.

Claims

1. A capacitor for high performance integrated circuits on the surface of a semiconductor substrate, said capacitor comprising a top plate and a bottom plate and a layer of dielectric interspersed between said top and said bottom plate, comprising:

a semiconductor substrate having at least one interconnect metal layer over said semiconductor substrate, and a passivation layer over said at least one interconnect metal layer wherein said passivation layer comprises a layer within the range of approximately 0.15 to 2.0 μ

m of Plasma Enhanced CVD (PECVD) oxide over which a layer within the range of approximately 0.5 to 2.0 μ

m PECVD nitride is deposited and wherein said passivation layer comprises at least one passivation opening through which is exposed at least one top level metal contact point;

a first layer of conductive material deposited over said passivation layer and within said at least one opening in said passivation layer wherein said first layer of conductive material is connected to said at least one top level metal contact point and wherein said first layer of conductive material forms said bottom plate of said capacitor,

a layer of dielectric deposited over the surface of said first layer of conductive material, forming said layer of dielectric interspersed between said top plate and said bottom plate; and

a second layer of conductive material deposited over the surface of said layer of dielectric forming said top plate of said capacitor.

2. The capacitor of claim 1 further comprising a polymer insulating, separating layer formed over said passivation layer and under said capacitor.

3. The capacitor of claim 2 wherein said polymer insulating, separating layer comprises polyimide or the polymer benzocyclobutene (BCB).

4. The capacitor of claim 2 wherein said polymer insulating, separatng layer of a thickness after curing within the range of approximately 2.0 to 150 μ

m.

5. The capacitor of claim 2 wherein said polymer insulating, separating layer is spin-on coated and cured.

6. The capacitor of claim 1 wherein said first and second conductive layers have a thickness of between about 0.5 and 20 μ

m.

7. The capacitor of claim 1 wherein said first and second conductive layers comprise copper, silver, or gold.

8. The capacitor of claim 1 wherein said layer of dielectric has a thickness of between about 500 and 10,000 Angstroms.

9. The capacitor of claim 1 wherein said layer of dielectric comprises a high dielectric constant material such as TiO₂ or Ta₂O₅.

10. The capacitor of claim 1 wherein said at least one opening in said passivation layer has a diameter of between about 0.5 and 30 μ

m.

11. The capacitor of claim 1 further comprising a polymer layer overlying said top electrode of said capacitor.

12. A capacitor for high performance integrated circuits on the surface of a semiconductor substrate, said capacitor comprising a top plate and a bottom plate and a layer of dielectric interspersed between said top and said bottom plate, comprising:

a semiconductor substrate having at least one interconnect metal layer over said semiconductor substrate, and a passivation layer over said at least one interconnect metal layer wherein said passivation layer comprises a layer within the range of approximately 0.15 to 2.0 μ

m of silicon oxide underlying a layer within the range of approximately 0.5 to 2.0 μ

m of silicon nitride and wherein said passivation layer comprises at least one passivation opening through which is exposed at least one top level metal contact point;

a polymer insulating, separating layer formed over said passivation layer wherein polymer openings are formed in said polymer insulating, separating layer over each of said passivation openings;

a first layer of conductive material deposited over said passivation layer and within said at least one opening in said polymer layer and in said passivation layer wherein said first layer of conductive material is connected to said at least one top level metal contact point and wherein said first layer of conductive material forms said bottom plate of said capacitor;

a layer of dielectric deposited over the surface of said first layer of conductive material, forming said layer of dielectric interspersed between said top plate and said bottom plate; and

a second layer of conductive material deposited over the surface of said layer of dielectric forming said top plate of said capacitor.

13. The capacitor of claim 12 wherein said polymer insulating, separating layer comprises polyimide or the polymer benzocyclobutene (BCB).

14. The capacitor of claim 12 wherein said polymer insulating, separating layer is of a thickness after curing within the range of approximately 2.0 to 150 μ

m.

15. The capacitor of claim 12 wherein said polymer insulating, separating layer is spin-on coated and cured.

16. The capacitor of claim 12 wherein said first and second conductive layers have a thickness of between about 0.5 and 20 μ

m.

17. The capacitor of claim 12 wherein said first and second conductive layers comprise copper, silver, or gold.

18. The capacitor of claim 12 wherein said layer of dielectric has a thickness of between about 500 and 10,000 Angstroms.

19. The capacitor of claim 12 wherein said layer of dielectric comprises a high dielectric constant material such as TiO₂ or Ta₂O₅.

20. The capacitor of claim 12 wherein said at least one opening in said passivation layer has a diameter of between about 0.5 and 30 μ

m.

21. The capacitor of claim 12 further comprising a polymer layer overlying said top electrode of said capacitor.