Systems and methods for a navigational device with forced layer switching based on memory constraints

• US 6,898,520 B2
• Filed: 05/08/2004
• Issued: 05/24/2005
• Est. Priority Date: 12/20/2001
• Status: Active Grant

• Current Assignee: Garmin Limited
• Original Assignee: Garmin Limited
• Inventors: Kao, Min H., Childs, Michael, Beesley, Darin J.
• Primary Examiner(s): Beaulieu, Yonel
• Application Number:
  US10/841,716
• Publication Number:
  US 20040215391A1
• Time in Patent Office: 381 Days
• Field of Search: 701/209, 701/211, 701/213, 701/214
• US Class Current: 701/209
• CPC Class Codes: G01C 21/3446 Details of route searching algorithms, e.g. Dijkstra, A*, arc-flags, using precalculated routes

Abstract

Systems, devices and methods are provided for more efficient use of RAM and other resources in connection with a route calculation algorithm which quickly obtains a best or reasonable best path between two locations. The navigational aid device includes forced layer switching capabilities. The navigational aid device includes a processor and a memory adapted to communicate with the processor. The memory has cartographic data including any number of locations and data indicative of thoroughfares of a plurality of types connecting certain ones of the locations. The plurality of thoroughfares are organized in a hierarchy of detail levels. The processor operates on a route calculation algorithm to find a path between any two of the number of locations and the route calculation algorithm dynamically forces switching between different levels in the hierarchy of detail levels based on a set of criteria.

Claims

1. A GPS enabled device, comprising:

within a housing of the device,

a processor;

a memory to communicate with the processor, the memory having cartographic data including a number of locations and data indicative of thoroughfares of various detail connecting certain ones of the locations and a set of executable instructions to force switching between thoroughfares of various detail;

wherein the processor operates on a route calculation algorithm to determine a path to a selected one of the number of locations;

a display coupled to the processor, the display viewable at a front face of the housing; and

a GPS patch antenna coupled to the processor and located above the display within the housing.

2. The device of claim 1, including a GPS receiver coupled to the processor to provide a position of the GPS enabled device, and wherein the path includes a path between the position and the selected one of the number of locations.

3. The device of claim 1, wherein the processor operates on the route calculation algorithm to force switching between different levels in a hierarchy of detail levels based on a set of criteria provided to the memory.

4. The device of claim 3, wherein the set of criteria includes:

a number of jump segments requirement;

a distance requirement;

a minimum memory usage requirement;

a maximum memory usage requirement; and

an at least one jump segment requirement.

5. The device of claim 4, wherein the distance requirement includes a minimum distance requirement, the minimum distance requirement being at least 3 kilometers.

6. The device of claim 4, wherein the set of criteria are independently variable in order to tailor an aggressiveness with which the route calculation algorithm forces switching between different levels in the hierarchy of detail levels.

7. The device of claim 1, wherein the PDA includes a multifunction device capable of cellular communication.

8. A GPS enabled device, comprising:

within a housing of the device,

a processor;

a memory in communication with the processor, the memory having cartographic data including a number of locations and data indicative of thoroughfares of various detail connecting certain ones of the locations and a set of executable instructions to force switching between thoroughfares of various detail;

wherein the processor operates on a route calculation algorithm to determine a path to a selected one of the number of locations;

a display coupled to the processor, the display viewable at a front face of the housing;

an integrated GPS coupled to the processor and having an antenna located above the display within the housing; and

a cellular transceiver coupled to the processor and located within the housing.

9. The GPS enabled device of claim 8, wherein thoroughfares of various detail are contained in a data structure organized in a hierarchy of detail layers.

10. The GPS enabled device of claim 9, wherein the processor operates on the route calculation algorithm and the hierarchy of detail layers to find a convergence between any two of the number of locations.

11. The GPS enabled device of claim 10, and the route calculation algorithm forces switching to another layer in the hierarchy of detail layers based on a set of criteria provided to the memory, the set of criteria including a maximum memory usage requirement and an at least one jump segment requirement.

12. The GPS enabled device of claim 11, wherein the maximum memory usage requirement for the lowest layer is no greater than 35% of available space on the memory.

13. The GPS enabled device of claim 11, wherein the set of criteria further includes:

a number of jump segments requirement;

a distance requirement; and

a minimum memory usage requirement.

14. The GPS enabled device of claim 13, wherein the minimum memory usage requirement at a greatest layer of detail in the hierarchy of detail layers is at least 2% of available space on the memory.

15. The GPS enabled device of claim 9, wherein the hierarchy of detail layers includes a hierarchy of ever-decreasing details such that a lowest layer includes the greatest amount of detail.

16. The GPS enabled device of claim 9, wherein presence of a type of thoroughfare in a given layer of the hierarchy of detail layers is determined by a traversability of the thoroughfare.

17. A device navigation aid method, comprising:

providing a GPS enabled device, wherein a housing of the PDA includes;

a processor;

a memory adapted to communicate with the processor, the memory having cartographic data including a number of locations and data indicative of thoroughfares of various detail connecting certain ones of the locations;

a display coupled to the processor, the display viewable at a front face of the housing;

integrating a GPS receiver having a GPS antenna in the housing with the processor, such that the GPS antenna is located above the display;

determining a path to a selected one of the number of locations with a route calculation algorithm; and

forcing switching between thoroughfares of various detail in determining the path.

18. The method of claim 17, wherein the method further includes;

organizing in the memory data indicative of thoroughfares of various detail according to a hierarchy of detail layers; and

using a route calculation algorithm to find a convergence between at least two of the number of locations.

19. The method of claim 18, wherein organizing in memory data indicative of thoroughfares of various detail according to a hierarchy of detail layers includes organizing the thoroughfares of various detail by layers of ever-decreasing detail such that a lowest layer includes the greatest amount of detail.

20. The method of claim 19, wherein using the route calculation algorithm includes forcing layer switching to another layer in the hierarchy of detail layers by assigning a set of criteria to the algorithm, the set of criteria including a maximum memory usage requirement and an at least one jump segment requirement.

21. The method of claim 20, wherein assigning a maximum memory usage requirement includes assigning a maximum memory usage requirement for the lowest layer equal to or less than 35% of available space on the memory.

22. The method of claim 21, wherein assigning a set of criteria to the algorithm includes assigning a set of criteria which further includes:

a number of jump segments requirement;

a distance requirement; and

a minimum memory usage requirement.

23. The method of claim 22, wherein the set of criteria are independently variable at each layer in the hierarchy of detail layers.

24. The method of claim 22, wherein assigning the minimum memory usage requirement at a greatest layer of detail in the hierarchy of detail layers is at least 2% of available space on the memory.

25. A device navigation aid method, comprising:

providing a GPS enabled device, wherein a housing of the device includes;

a processor;

a memory adapted to communicate with the processor, the memory having cartographic data including a number of locations and data indicative of thoroughfares of various detail connecting certain ones of the locations;

a display coupled to the processor, the display viewable through the housing;

integrating a GPS receiver having a GPS antenna in the housing with the processor, such that the GPS antenna is located above the display;

integrating a cellular transceiver in the housing with the processor;

calculating a path between any two of the number of locations; and

forcing switching between thoroughfares of various detail in calculating the path.

26. The method of claim 25, wherein the method further includes;

providing a data structure to the memory, the data structure indicative of thoroughfares of various detail organized according to a hierarchy of detail layers and having node locations connecting the thoroughfares of various detail;

beginning at a first node location, evaluating a number of adjacent nodes for a convergence between a first node location and a second node location;

for each evaluated adjacent nodes, evaluating a next adjacent node;

maintaining a list of nodes having a jump segment to a next layer in the hierarchy of detail layers and maintaining a running total of nodes explored from a given jump segment node; and

forcing a layer switch in the hierarchy of detail layers based on a set of criteria.

27. The method of claim 26, wherein forcing a layer switch in the hierarchy of detail layers based on a set of criteria includes forcing a layer switch when at least one jump segment has been found and a maximum memory allowance has been utilized for a given layer, the maximum memory allowance for each given layer being independently variable.

28. The method of claim 27, wherein the method further includes preventing a layer switch in the hierarchy of detail layers until a requisite number of jump segments have been found in combination with a requisite number in the running total of nodes explored from a given jump segment node, a minimum distance from the first node location has been explored, and a minimum memory space has been utilized for a given layer.

29. The method of claim 28, wherein, in the method, forcing a layer switch preempts preventing a layer switch.

30. The method of claim 28, wherein the requisite number of jump segments in combination with the requisite number in the running total of nodes explored from a given jump segment node, the minimum distance from the first node location that has been explored, and the minimum memory space utilization are all independently variable for each given layer.

31. The method of claim 30, wherein each given layer includes a number of alternatives for the requisite number of jump segments and requisite number in the running total of nodes explored from a given jump segment node combinations.

32. The method of claim 25, wherein the method further includes, simultaneous with evaluating a number of adjacent nodes beginning at a first node location, beginning at a second node location and evaluating a number of adjacent nodes thereto for a convergence between a first node location and the second node location.

33. The method of claim 32, wherein the method further includes selecting a solution from a number of convergences between the first node location and the second node location.

34. The method of claim 25, wherein the method further includes a server, coupled to the device via the cellular transceiver, to respond to a request from the device by performing calculations on the cartographic data and transmitting results to the device.

35. A method of manufacturing a combined GPS/PDA, comprising:

providing a portable, handheld housing;

locating within the housing a processor, a memory, and a display viewable at a front face of the housing, the memory and the processor operable to execute a GPS functionality and a PDA functionality, the memory operable to communicate with the processor, the memory having cartographic data including a number of locations and data indicative of thoroughfares of various detail connecting certain ones of the locations;

locating within the housing a GPS receiver having a GPS antenna, such that the GPS antenna is located above the display;

calculating a path between any two of the number of locations by using a route calculation algorithm; and

forcing switching between thoroughfares of various detail in calculating the path.

36. The method of claim 35, wherein the method further includes locating a wireless communication component within the housing.

37. The method of claim 35, wherein the method further includes locating an input that is accessible at a front face of the housing at a location below the display.