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Multiport high speed communications integrated circuit

  • US 6,898,655 B1
  • Filed: 11/16/2001
  • Issued: 05/24/2005
  • Est. Priority Date: 11/16/2001
  • Status: Expired due to Term
First Claim
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1. An integrated circuit comprising:

  • a high speed bus interface to interface to a core chipset through a high speed bus;

    a serial mass data storage host adapter in communication with the high speed bus interface to control a high speed mass data storage unit;

    wherein the serial mass data storage host adapter controls the high speed mass data storage unit in response to a signal from the core chipset; and

    a network controller in communication with the high speed bus interface to control a network port.

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