Unit pixel in CMOS image sensor with enhanced reset efficiency

• US 6,900,485 B2
• Filed: 12/23/2003
• Issued: 05/31/2005
• Est. Priority Date: 04/30/2003
• Status: Active Grant

• Current Assignee: Intellectual Ventures II LLC (Intellectual Ventures LLC)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Lee, Won-Ho
• Primary Examiner(s): Eckert, George
• Assistant Examiner(s): Fenty, Jesse A.
• Application Number:
  US10/746,042
• Publication Number:
  US 20040217426A1
• Time in Patent Office: 525 Days
• Field of Search: 257290-292
• US Class Current: 257/292
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H04N 25/626 Reduction of noise due to residual charges remaining after image readout, e.g. to remove ghost images or afterimages
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

A unit pixel in a CMOS image sensor is employed to reduce a threshold voltage of a reset transistor by modifying a unit pixel circuit. The unit pixel in the CMOS image sensor including: a semiconductor substrate including an epitaxial layer in which an active area and a FOX area are defined; a photodiode formed in the epitaxial layer; a transfer transistor including source/drain regions disposed between the photodiode and a floating diffusion node, wherein a control signal is applied to a gate thereof; a reset transistor including source/drain regions disposed between the floating diffusion node and a VDD terminal, wherein a control signal is applied to a drain thereof; a drive transistor of which a gate is connected to the floating diffusion node and a drain is connected to the VDD terminal; and a selection transistor of which a drain is connected to the drain of the drive transistor and a source is connected to an output terminal, wherein a control signal is applied to a gate thereof.

Claims

1. A unit pixel for use in a complementary metal oxide semiconductor (CMOS) image sensor, comprising:

a semiconductor substrate including an epitaxial layer in which an active area and a field oxide (FOX) area are defined;

a photodiode formed in a predetermined location of the epitaxial layer;

a transfer transistor including source/drain regions disposed between the photodiode and a floating diffusion region, wherein a transfer control signal is applied to a gate thereof;

a reset transistor including source/drain regions disposed between the floating diffusion region and a power supply voltage (VDD) terminal, wherein a reset control signal is applied to a drain thereof;

a drive transistor of which a gate is connected to the floating diffusion region and a drain is connected to the VDD terminal; and

a selection transistor of which a drain is connected to a source of the drive transistor and a source is connected to an output terminal, wherein a select control signal is applied to a gate thereof.

2. The unit pixel as recited in claim 1, wherein the reset control signal is applied to the drain of the reset transistor through a metal line and a VDD is applied to a gate of the reset transistor.

3. The unit pixel as recited in claim 1, wherein one active area where the reset transistor is formed and another active area where the drive transistor is formed are separated by the FOX area.

4. The unit pixel as recited in claim 1, wherein each gate electrode of the transistor uses a polysilicon.

5. The unit pixel as recited in claim 1, wherein the gate electrode of the reset transistor is connected to the VDD contact in a shape of a butting contact.

6. A unit pixel for use in the CMOS image sensor comprising:

a semiconductor substrate including an epitaxial layer in which an active area and a field oxide (FOX) area are defined;

a photodiode formed in a predetermined location of the epitaxial layer;

a transfer transistor including source/drain regions disposed between the photodiode and a floating diffusion node, wherein a transfer control signal is applied to a gate thereof;

a reset transistor including source/drain regions disposed between the photodiode and a power supply voltage (VDD) terminal, wherein a reset control signal is applied to a drain thereof;

a drive transistor of which a gate electrode is connected to the floating diffusion region and a drain is connected to the VDD terminal; and

a selection transistor of which a drain is connected to the drain of the drive transistor and a source is connected to an output terminal, wherein a select control signal is applied to a gate thereof.

7. The unit pixel as recited in claim 6, wherein the reset control signal is applied to the drain of the reset transistor through a metal line and a VDD is applied to a gate of the reset transistor.

8. The unit pixel as recited in claim 6, wherein one active area where the reset transistor is formed and another active area the drive transistor is formed are separated by the FOX area.

9. The unit pixel as recited in claim 6, wherein each gate electrode of the transistor uses a polysilicon.

10. The unit pixel as recited in claim 6, wherein the gate electrode is connected to the VDD contact in a shape of a butting contact.

11. A CMOS image sensor having a plurality of unit pixels, said each unit pixel comprising:

a semiconductor substrate including an epitaxial layer in which an active area and a field oxide (FOX) area are defined;

a photodiode formed in a predetermined location of the epitaxial layer;

a transfer transistor including source/drain regions disposed between the photodiode and a floating diffusion region, wherein a transfer control signal is applied to a gate thereof;

a reset transistor including source/drain regions disposed between the floating diffusion region and a power supply voltage (VDD) terminal, wherein a reset control signal is applied to a drain thereof;

a drive transistor of which a gate is connected to the floating diffusion region and a drain is connected to the VDD terminal; and

a selection transistor of which a drain is connected to a source of the drive transistor and a source is connected to an output terminal, wherein a select control signal is applied to a gate thereof.

12. The unit pixel as recited in claim 11, wherein the reset control signal is applied to the drain of the reset transistor through a metal line and a VDD is applied to a gate of the reset transistor.

13. The unit pixel as recited in claim 11, wherein one active area where the reset transistor is formed and another active area where the drive transistor is formed are separated by the FOX area.

14. The unit pixel as recited in claim 11, wherein the gate electrode of the reset transistor is connected to the VDD contact in a shape of a butting contact.

15. A CMOS image sensor having a plurality of unit pixels, said each unit pixel comprising:

a semiconductor substrate including an epitaxial layer in which an active area and a field oxide (FOX) area are defined;

a photodiode formed in a predetermined location of the epitaxial layer;

a transfer transistor including source/drain regions disposed between the photodiode and a floating diffusion node, wherein a transfer control signal is applied to a gate thereof;

a reset transistor including source/drain regions disposed between the photodiode and a power supply voltage (VDD) terminal, wherein a reset control signal is applied to a drain thereof;

a drive transistor of which a gate electrode is connected to the floating diffusion region and a drain is connected to the VDD terminal; and

a selection transistor of which a drain is connected to the drain of the drive transistor and a source is connected to an output terminal, wherein a select control signal is applied to a gate thereof.

16. The unit pixel as recited in claim 15, wherein the reset control signal is applied to the drain of the reset transistor through a metal line and a VDD is applied to a gate of the reset transistor.

17. The unit pixel as recited in claim 15, wherein one active area where the reset transistor is formed and another active area the drive transistor is formed are separated by the FOX area.

18. The unit pixel as recited in claim 15, wherein the gate electrode is connected to the VDD contact in a shape of a butting contact.