Integrated circuit inductors

• US 6,900,716 B2
• Filed: 03/18/2002
• Issued: 05/31/2005
• Est. Priority Date: 07/09/1999
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Primary Examiner(s): MAI, ANH T
• Application Number:
  US10/101,142
• Publication Number:
  US 20020097132A1
• Time in Patent Office: 1,170 Days
• Field of Search: 336/200, 336/223, 336/232, 296/021, 296/05, 296/06
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 27/2804 Printed windings
• CPC Class Codes: H01F 37/00 Fixed inductances not covered by group H01F17/00
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: Y10S 257/924 with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap
• CPC Class Codes: Y10T 29/4902 Electromagnet, transformer or inductor
• CPC Class Codes: Y10T 29/49037 Using reference point/surface to facilitate measuring
• CPC Class Codes: Y10T 29/49069 Data storage inductor or core
• CPC Class Codes: Y10T 29/49071 by winding or coiling
• CPC Class Codes: Y10T 29/49073 by assembling coil and core
• CPC Class Codes: Y10T 29/49075 including permanent magnet or core

Abstract

The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.

Claims

1. A memory system comprising:

a substrate having a plurality of memory cells and a coating; and

a conductive path interwoven with the substrate and operable for creating a magnetic field in the coating but not above the coating.

2. The memory system of claim 1, wherein the coating includes a magnetic film.

3. The memory system of claim 2, wherein the coating includes an insulating layer atop the magnetic film.

4. The memory system of claim 1, wherein the plurality of memory cells are electrically connected to the conductive path.

5. A memory system comprising:

a substrate;

a coating formed on a first portion of the substrate;

a circuit formed on a second portion of the substrate, the circuit having a plurality of memory cells; and

a conductive path interwoven with the substrate so as to surround the coating and be operable to create a magnetic field in the coating but not above the coating.

6. The memory system of claim 5, wherein the circuit is operatively coupled to the conductive path.

7. The memory system of claim 5, wherein the coating includes a magnetic film.

8. The memory system of claim 7, wherein the magnetic film includes nickel and iron.

9. The memory system of claim 5, wherein the conductive path includes planar metal segments that traverse the coating.

10. The memory system of claim 5, further including a sense inductor formed integral with the substrate and magnetically coupled to the conductive path.

11. A memory system comprising:

a substrate;

a circuit formed on the substrate, the circuit comprising a plurality of memory cells;

a magnetic film having first and second edges formed atop a portion of the substrate;

a contiguous conductive coil having first segments that pass through the substrate adjacent the first and second edges, and second segments that traverse the magnetic film; and

wherein the contiguous conductive coil is operative to create a magnetic field in the magnetic film but not above the magnetic film.

12. The memory system of claim 11, wherein the circuit is coupled to the contiguous conductive coil.

13. The memory cell of claim 11, wherein the substrate comprises a semiconductor material.

14. The memory cell of claim 11, wherein the magnetic film is covered with an insulating layer.

15. The memory cell of claim 14, wherein the insulating layer covers the second segments.

16. The memory cell of claim 11, wherein the contiguous conductive coil is formed from two or more metals.

17. The memory cell of claim 11, wherein the contiguous conductive coil has a triangular cross-section.

18. A memory system comprising:

a semiconductor substrate having first and second opposing surfaces;

a coating formed on a first portion of the first surface;

a plurality of memory cells formed on a second portion of the first surface;

a coil interwoven with the substrate and magnetically coupled to the coating so as to form a magnetic field within the coating but not above the coating when a current passes through the coil; and

wherein the plurality of memory cells are electrically connected to the coil.

19. The memory system of claim 18, wherein the semiconductor substrate is one of silicon, germanium, gallium arsenide and silicon carbide.

20. The memory system of claim 18, wherein the coating includes a magnetic film formed immediately adjacent the substrate.

21. The memory system of claim 20, wherein the coating includes an insulating layer covering the magnetic film.

22. The memory system of claim 21, wherein the insulating layer covers a portion of the coil.

23. A memory system comprising:

a substrate;

a plurality of memory cells formed integral with the substrate;

a conductive coil having an inductance and connected to the memory cells, the coil being interwoven with a portion of the substrate by passing through the substrate through a plurality of subtending holes formed in the substrate;

a coating formed on the substrate and surrounded by the coil, the coating designed to increase the inductance of the coil; and

wherein the coil is operative to create a magnetic field in the coating but not above the coating.

24. The memory system of claim 23, wherein the coating includes a magnetic film.

25. The memory system of claim 24, wherein the coating includes an insulating layer formed atop the magnetic film.

26. The memory system of claim 25, wherein the insulating layer is a dielectric.

27. A memory system comprising:

a substrate;

a magnetic film formed over a portion of the substrate;

a conductive path located at least partially above the magnetic film that pierces the magnetic film and is interlaced with the substrate;

a plurality of memory cells formed on the substrate and operatively coupled to the conductive path; and

wherein the conductive path is operable for creating a magnetic field in the magnetic film but not above the magnetic film.

28. The memory system of claim 27, wherein the conductive path includes flat parallel conducting segments that traverse the magnetic film.

29. The memory system of claim 27, wherein the conductive path has a rectangular cross-section.

30. The memory system of claim 27, wherein the conductive path has a triangular cross-section.

31. A memory system comprising:

a substrate;

a plurality of memory cells formed integral with the substrate;

a coating formed over a portion of the substrate remote from the plurality of memory cells;

a conductive coil formed integral with the substrate, with a portion of the coil surrounding the coating so as to create a magnetic field within the coating but not above the coating; and

wherein the memory cells and conductive coil are operatively coupled.

32. The memory system of claim 31, further including a sense coil formed on the substrate.

33. The memory system of claim 31, further including a sense coil formed in the substrate.

34. The memory system of claim 31, wherein the conductive coil is formed of interconnecting first and second segments, wherein the first segments are formed from a first conductor and the second segments are formed from a second conductor.

35. The memory system of claim 31, wherein the coating comprises a magnetic material.

36. The memory system of claim 35, wherein the coating comprises an insulating material.