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Matrix multiplication in a vector processing system

  • US 6,901,422 B1
  • Filed: 03/21/2001
  • Issued: 05/31/2005
  • Est. Priority Date: 03/21/2001
  • Status: Active Grant
First Claim
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1. A method for efficiently performing matrix multiplication in a vector processing computer system by using partial products that is bit-by-bit compatible with conventional matrix multiplication techniques, wherein two matrices are stored in vector registers within the computer system, comprising the steps of:

  • storing values within a first group of vector registers within a vector processor that each comprise multiple copies of a respective individual value of a first matrix to be multiplied;

    storing values within a second group of vector registers within a vector processor that each comprise values from a respective row of a second matrix to be multiplied;

    dot multiplying each of said first vector registers having values from a single row of said first matrix by each of said second vector registers;

    adding the values obtained by said step of multiplying to a third group of vector registers corresponding to a product matrix; and

    repeating said steps of multiplying and adding, for said first vector registers having values from every row of said first matrix.

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