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Internal cache for on chip test data storage

  • US 6,901,542 B2
  • Filed: 08/09/2001
  • Issued: 05/31/2005
  • Est. Priority Date: 08/09/2001
  • Status: Expired due to Fees
First Claim
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1. A method of testing a semiconductor device comprising:

  • selecting a portion of a memory, said memory comprised by said semiconductor device;

    testing said selected portion of said memory;

    designating said selected portion of said memory as a designated memory in response to an acceptable testing result; and

    storing data in said designated portion of said memory for retrieval at a later time, said data comprising test data resultant from additional testing of said semiconductor device and unrelated to testing said selected portion of said memory.

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