Method for altering a word stored in a write-once memory device

• US 6,901,549 B2
• Filed: 12/14/2001
• Issued: 05/31/2005
• Est. Priority Date: 12/14/2001
• Status: Expired due to Fees

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Matrix Semiconductor, Inc. (Western Digital Corporation)
• Inventors: Johnson, Mark G., Moore, Christopher S., March, Roger W.
• Primary Examiner(s): CHUNG, PHUNG M
• Application Number:
  US10/023,200
• Publication Number:
  US 20030115535A1
• Time in Patent Office: 1,264 Days
• Field of Search: 714/758, 714/752, 714/785, 707/205
• US Class Current: 714/758
• CPC Class Codes: G11C 17/14 in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
• CPC Class Codes: G11C 17/146 Write once memory, i.e. allowing changing of memory content by writing additional bits
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
• CPC Class Codes: G11C 7/24 Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells

Abstract

The preferred embodiments described herein provide a method for altering a word stored in a write-once memory device. In one preferred embodiment, a write-once memory device is provided storing a word comprising a plurality of data bits and a plurality of syndrome bits. The word is altered by identifying X bit(s) in the word that are in an un-programmed state and switching the X bit(s) from the un-programmed state to a programmed state, where X is sufficient to introduce an uncorrectable error in the word. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.

Claims

1. A method for altering a word stored in a write-once memory device, the method comprising:

(a) providing a write-once memory device storing a word comprising a plurality of data bits and a plurality of syndrome bits;

(b) identifying X bit(s) in the word that are in an un-programmed state; and

(c) switching said X bit(s) in the word from the un-programmed state to a programmed state, wherein X is sufficient to introduce an uncorrectable error in the word.

2. The invention of claim 1 further comprising:

(d) attempting to correct the uncorrectable error in the word using an error protection scheme.

3. The invention of claim 2, wherein the error protection scheme comprises error correcting code (ECC).

4. The invention of claim 2, wherein the error protection scheme is implemented in the write-once memory device.

5. The invention of claim 2, wherein the write-once memory device is coupled with a host device, and wherein the error protection scheme is implemented in the host device.

6. The invention of claim 1, wherein at least some of said X bit(s) are in the plurality of data bits.

7. The invention of claim 1, wherein at least some of said X bit(s) are in the plurality of syndrome bits.

8. The invention of claim 1, wherein said X bit(s) are switched from the unprogrammed state to the programmed state by overwriting the word with a second word.

9. The invention of claim 1, wherein the word is associated with a digital file stored in the write-once memory device, and wherein (b) and (c) are performed in response to a command to delete the digital file.

10. The invention of claim 1, wherein X=1.

11. The invention of claim 1, wherein X=2.

12. The invention of claim 1, wherein the write-once memory device comprises a three-dimensional memory array.

13. A method for altering a word stored in a write-once memory device, the method comprising:

(a) providing a write-once memory device storing a first word comprising a first plurality of data bits and a first plurality of syndrome bits;

(b) identifying a single bit in the first plurality of data bits that is in an unprogrammed state;

(c) generating a second word comprising a second plurality of data bits and a second plurality of syndrome bits based on the second plurality of data bits, wherein all of the second plurality of data bits are in the un-programmed state except for a bit that corresponds to the single bit; and

(d) overwriting the first word with the second word.

14. The invention of claim 13, wherein a word resulting from the overwriting comprises an uncorrectable error, and wherein the invention further comprises:

(e) attempting to correct the uncorrectable error using an error protection scheme.

15. The invention of claim 14, wherein the error protection scheme comprises error correcting code (ECC).

16. The invention of claim 14, wherein the error protection scheme is implemented in the write-once memory device.

17. The invention of claim 14, wherein the write-once memory device is coupled with a host device, and wherein the error protection scheme is implemented in the host device.

18. The invention of claim 13 further comprising:

determining whether switching the single bit from the un-programmed state to the programmed state will create an uncorrectable error in a word resulting from the overwriting; and

performing (d) only if switching the single bit from the un-programmed state to the programmed state will create an uncorrectable error.

19. The invention of claim 18 further comprising:

if switching the single bit from the un-programmed state to the programmed state will not create the uncorrectable error in the word resulting from the overwriting;

identifying at least one additional bit in the first plurality of data bits that is in the un-programmed state;

generating an additional word comprising an additional plurality of data bits and an additional plurality of syndrome bits based on the additional plurality of data bits, wherein all of the additional plurality of data bits are in the unprogrammed state except for bits that correspond to the single bit and the at least one additional bit; and

overwriting the first word with the additional word.

20. The invention of claim 13, wherein the word is associated with a digital file stored in the write-once memory device, and wherein (b)-(d) are performed in response to a command to delete the digital file.

21. The invention of claim 13, wherein the write-once memory device comprises a three-dimensional memory array.