Voltage controlled oscillator

• US 6,903,613 B1
• Filed: 12/20/2002
• Issued: 06/07/2005
• Est. Priority Date: 12/20/2002
• Status: Active Grant

• Current Assignee: Tamiras Per Pte Ltd LLC (Intellectual Ventures LLC)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Mitchell, Eric P., Gehring, Mark R.
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US10/327,354
• Time in Patent Office: 900 Days
• Field of Search: 331/1.A, 331/10, 331/11, 331/16, 331/18, 331/25, 331/44, 331/177.R, 331/179
• US Class Current: 331/11
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/113 using frequency discriminator

Abstract

Embodiments of the present invention provide a method of centering an operating band of a voltage controlled oscillator around a desired operating frequency. In one embodiment, an adjustable feedback divider provides for driving an output signal to the top and bottom of the operating band. An adjustable period divider and counter provide a plurality of count values for use in determining a mid-point of the operating band. A capacitance bank provides for selectively adjusting a capacitance of the voltage controlled oscillator, thereby adjusting the operating band.

Claims

1. A method of centering an operating band of a voltage controlled oscillator about a desired operating frequency comprising:

a) determining a mid-point frequency of said operating band;

b) comparing said mid-point frequency to said desired operating frequency; and

c) adjusting a capacitance of said voltage controlled oscillator according to said comparison in said b).

2. The method according to claim 1, wherein said a) determining a mid-point frequency comprises:

detecting a bottom frequency of said operating band;

detecting a top frequency of said operating band; and

averaging said bottom frequency and said top frequency.

3. The method according to claim 2, wherein said detecting a bottom frequency of said operating band comprises selecting a low feedback divide value to drive said voltage controlled oscillator to said bottom frequency;

and

wherein said detecting a top frequency of said operating band comprises selecting a high feedback divide value to drive said voltage controlled oscillator to said top frequency.

4. The method according to claim 1, wherein said c) adjusting said capacitance comprises selectively coupling a plurality of capacitors.

5. The method according to claim 1, further comprising:

d) iteratively repeating said a), b) and c) until said mid-point frequency substantially equals said desired operating frequency.

6. A voltage controlled oscillator comprising:

an adjustable feedback divider coupled to an output of said voltage controlled oscillator and a first output of a control logic;

an adjustable period divider coupled to an output of said adjustable feedback divider and a second output of said control logic;

a counter coupled to an output of said adjustable period divider and an output of a reference clock generator; and

wherein said control logic is coupled to an output of said counter.

7. The voltage controlled oscillator according to claim 6, wherein said adjustable feedback divider and said control logic provide for driving said voltage controlled oscillator to a top of an operating band and a bottom of said operating band in response to a first user input.

8. The voltage controlled oscillator according to claim 7, wherein said adjustable period divider, counter, and control logic provide for determining an actual count value for output to a user.

9. The voltage controlled oscillator according to claim 8, further comprising a capacitance bank, wherein said capacitance bank is selectively adjusted in response to a second user input received by said control logic.

10. The voltage controlled oscillator according to claim 9, wherein an operating band of an output signal provided by said voltage controlled oscillator is readily centered about a desired operating frequency.

11. The voltage controlled oscillator according to claim 10, wherein process variations in said voltage controlled oscillator resulting in shifting of said operating band are readily compensated for by selectively adjusting said capacitance bank.

12. The voltage controlled oscillator according to claim 11, wherein shifting of said operating band of said voltage controlled oscillator due to variations in the operating temperature are readily compensated for by selectively adjusting said capacitance bank.

13. The voltage controlled oscillator according to claim 7, wherein said voltage controlled oscillator comprises a phase lock loop voltage controlled oscillator.

14. A method of centering an operating band of a phase lock loop voltage controlled oscillator about a desired operating frequency comprising:

a) determining an expected count;

b) determining an actual count;

c) increasing a capacitance of said voltage controlled oscillator when said actual count is less than said expected count; and

d) decreasing a capacitance of said voltage controlled oscillator when said actual count is greater than said expected count.

15. The method according to claim 14, wherein said expected count is based upon a desired operating frequency.

16. The method according to claim 14, wherein said actual count is based upon the average of an upper operating frequency and a lower operating frequency of said operating band.

17. The method according to claim 16, further comprising:

determining said upper operating frequency by dividing by a large feedback value and a small clock period value and counting the number of reference clock cycles in a clock period cycle; and

determining said lower operating frequency by dividing by a small feedback value and a large clock period value and counting the number of reference clock cycles in a clock period cycle.

18. The method according to claim 14, wherein said capacitance comprises a capacitance bank.

19. The method according to claim 18, wherein said capacitance bank comprises a plurality of selectively couplable binary weighted capacitors.

20. The method according to claim 19, wherein said c) increasing said capacitance comprises coupling a next most significant binary weighted capacitor to said voltage controlled oscillator, and wherein said d) decreasing said capacitance comprises un-coupling a current significant binary weighted capacitor and coupling said next most significant binary weighted capacitor.