Display device having improved drive circuit and method of driving same

• US 6,903,716 B2
• Filed: 03/07/2003
• Issued: 06/07/2005
• Est. Priority Date: 03/07/2002
• Status: Expired due to Term

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: Hitachi, Ltd.
• Inventors: Kawabe, Kazuyoshi, Hirakata, Junichi
• Primary Examiner(s): Awad, Amr A.
• Application Number:
  US10/382,925
• Publication Number:
  US 20030169247A1
• Time in Patent Office: 823 Days
• Field of Search: 345 88- 89, 345 97-100, 345/102, 345/213, 345/698, 345/699, 348/556
• US Class Current: 345/99
• CPC Class Codes: G09G 2310/021 Double addressing, i.e. scanning two or more lines, e.g. lines 2 and 3; 4 and 5, at a time in a first field, followed by scanning two or more lines in another combination, e.g. lines 1 and 2; 3 and 4, in a second field
• CPC Class Codes: G09G 2310/0224 Details of interlacing
• CPC Class Codes: G09G 2310/0232 Special driving of display border areas
• CPC Class Codes: G09G 2320/0261 in the context of movement of objects on the screen or movement of the observer relative to the screen
• CPC Class Codes: G09G 2320/062 Adjustment of illumination source parameters
• CPC Class Codes: G09G 2320/103 Detection of image changes, e.g. determination of an index representative of the image change
• CPC Class Codes: G09G 2340/0407 Resolution change, inclusive of the use of different resolutions for different screen areas
• CPC Class Codes: G09G 2340/0442 Handling or displaying different aspect ratios, or changing the aspect ratio
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/342 using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

In a display device, a first drive circuit supplies one and another first signals to plural adjacent scanning signal lines during first and second time intervals in a frame period, respectively. During the first time interval, a second drive circuit generates a second voltage corresponding to video data and supplies the second voltage to pixels associated with the adjacent scanning signal lines supplied with the first signal, and during the second time interval, the second drive circuit generates and supplies a second voltage to ones of the pixels associated with the adjacent scanning signal lines supplied with the first signal such that the pixels associated with the adjacent scanning signal lines supplied with the first signal produce luminance lower than that produced during the first time interval.

Claims

1. A display device comprising:

a pixel array having a plurality of pixels arranged in rows extending in a first direction and columns extending in a second direction intersecting said first direction,

each of said plurality of pixels being provided with a switching element;

a plurality of first signal lines extending in said first direction and arranged in said second direction,

each of said plurality of first signal lines supplying a first signal to said switching elements in ones of said plurality of pixels belonging to a corresponding one of said rows;

a plurality of second signal lines extending in said second direction and arranged in said first direction,

each of said plurality of second signal lines for supplying a second signal to at least one of said switching elements in ones of said plurality of pixels belonging to a corresponding one of said columns and supplied with said first signal such that said at least one of said switching elements determines a display state associated therewith;

a first drive circuit for supplying said first signal to each of said plurality of first signal lines;

a second drive circuit for supplying said second signal to each of said plurality of second signal lines; and

a display control circuit for (i) generating a timing signal for determining a timing for said first drive circuit to output said first signal, and (ii) generating video data used for generation of said second signal by said second drive circuit, based upon video information per frame period, wherein

said plurality of first signal lines are divided into a plurality of groups each comprising plural adjacent ones of said plurality of first signal lines,

said frame period includes a first time interval and a second time interval,

said first drive circuit supplies said first signal to said plurality of groups successively during each of said first time interval and said second time interval,

all of said first signal lines of each of said plurality of groups being supplied with said first signal at one time,

said second drive circuit generates said second voltage corresponding to said video data and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of first signal lines supplied with said first signal during said first time interval, and

said second drive circuit generates said second voltage and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of first signal lines supplied with said first signal during said second time interval such that said ones of said plurality of pixels associated with said one of said plurality of groups of first signal lines supplied with said first signal produce luminance lower than that produced during said first time interval.

2. A display device according to claim 1, wherein said video information which said display control circuit receives per frame period is video information per field period transmitted in an interlaced scanning system.

3. A display device according to claim 1, wherein said video information which said display control circuit receives per frame period is video information per field period transmitted in a progressive scanning system.

4. A display device according to claim 3, wherein said display control circuit generates said video data per frame period based upon a first video information group and a second video information group alternately on successive frames from said video information, said first video information group corresponds to alternate ones of said rows of said pixels, and said second video information group corresponds to alternate ones of said rows of said pixels other than said rows of said pixels for said first video information group.

5. A display device according to claim 1, wherein said display control circuit generates said video data by using a portion of said video information corresponding to a portion in number of rows of pixels.

6. A display device according to claim 1, wherein said display control circuit generates said video data by using a portion of said video information corresponding to a portion in number of columns of pixels.

7. A display device according to claim 1, wherein said display device has said plurality of pixels formed in a liquid crystal display panel and is provided with a light source for illuminating said liquid crystal display panel, and said light source is turned on and off in each of said frame period.

8. A display device comprising:

a pixel array having a plurality of pixels arranged in rows extending in a first direction and columns extending in a second direction intersecting said first direction,

each of said plurality of pixels being provided with a switching element;

a plurality of first signal lines extending in said first direction and arranged in said second direction,

each of said plurality of first signal lines supplying a first signal to said switching elements in ones of said plurality of pixels belonging to a corresponding one of said rows;

a plurality of second signal lines extending in said second direction and arranged in said first direction,

each of said plurality of second signal lines for supplying a second signal to at least one of said switching elements in ones of said plurality of pixels belonging to a corresponding one of said columns and supplied with said first signal such that said at least one of said switching elements determines a display state associated therewith;

a first drive circuit for supplying said first signal to each of said plurality of first signal lines;

a second drive circuit for supplying said second signal to each of said plurality of second signal lines; and

a display control circuit for (i) generating a timing signal for determining a timing for said first drive circuit to output said first signal, and (ii) generating video data used for generation of said second signal by said second drive circuit, based upon video information per frame period, wherein

said plurality of first signal lines are divided into a plurality of groups each comprising plural adjacent ones of said plurality of first signal lines,

said frame period includes at least two scanning periods,

said first drive circuit supplies said first signal to said plurality of groups successively during each of said at least two scanning periods, all of said first signal lines of each of said plurality of groups being supplied with said first signal at one time,

said second drive circuit generates said second voltage corresponding to said video data and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of first signal lines supplied with said first signal during at least one of said at least two scanning periods disposed at a beginning of said frame period, and

said second drive circuit generates said second voltage and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of first signal lines supplied with said first signal during at least one of said at least two scanning periods disposed at an end of said frame period such that said ones of said plurality of pixels associated with said one of said plurality of groups of first signal lines supplied with said first signal produce luminance lower than that produced during said at least one of said at least two scanning periods disposed at the beginning of said frame period.

9. A display device according to claim 8, wherein said second voltage generated during one of said at least one of said at least two scanning periods disposed at said beginning of said frame period is set to be higher than that generated during another of said at least one of said at least two scanning periods succeeding said one of said at least one of said at least two scanning periods disposed at said beginning of said frame period.

10. A display device according to claim 8, wherein

said frame period includes two scanning periods,

said first drive circuit supplies said first signal to said plurality of groups successively during each of said two scanning periods, all of said first signal lines of each of said plurality of groups being supplied with said first signal at one time,

said second drive circuit generates said second voltage corresponding to said video data and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of first signal lines supplied with said first signal during one of said two scanning periods disposed at a beginning of said frame period, and

said second drive circuit generates said second voltage and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of first signal lines supplied with said first signal during another of said two scanning periods succeeding said one of said two scanning periods,

a polarity of said second voltage generated during said another of said two scanning periods being opposite from a polarity of said second voltage generated during said one of said two scanning period.

11. A display device comprising:

a pixel array having a plurality of pixels arranged in rows extending in a first direction and columns extending in a second direction intersecting said first direction,

each of said plurality of pixels being provided with a switching element;

a plurality of first signal lines extending in said first direction and arranged in said second direction,

each of said plurality of first signal lines supplying a first signal to said switching elements in ones of said plurality of pixels belonging to a corresponding one of said rows;

a plurality of second signal lines extending in said second direction and arranged in said first direction,

each of said plurality of second signal lines for supplying a second signal to at least one of said switching elements in ones of said plurality of pixels belonging to a corresponding one of said columns and supplied with said first signal such that said at least one of said switching elements determines a display state associated therewith;

a first drive circuit for supplying said first signal to each of said plurality of first signal lines;

a second drive circuit for supplying said second signal to each of said plurality of second signal lines; and

a display control circuit for (i) generating a timing signal for determining a timing for said first drive circuit to output said first signal, and (ii) generating video data used for generation of said second signal by said second drive circuit, based upon video information per frame period, wherein

said plurality of first signal lines are divided into a first group and a second group,

said first group comprising alternate ones of said plurality of first signal lines, and

said second group comprising alternate ones of said plurality of first signal lines other than said first signal lines of said first group;

said frame period includes at least two scanning periods,

said first drive circuit supplies said first signal to said alternate ones of said plurality of first signal lines successively during at least one of said at least two scanning periods disposed at a beginning of said frame period, and supplies said first signal to a respective pair of one of said first signal lines of said second group and one of said first signal lines adjacent to said one of said first signal lines of said second group successively during at least one of said at least two scanning periods disposed at an end of said frame period,

said second drive circuit generates said second voltage corresponding to said video data and supplies said second voltage to ones of said plurality of pixels associated with one of said first signal lines of said first group supplied with said first signal during said at least one of said at least two scanning periods disposed at the beginning of said frame period, and

said second drive circuit generates said second voltage and supplies said second voltage to ones of said plurality of pixels associated with one of said respective pairs of first signal lines supplied with said first signal during said at least one of said at least two scanning periods disposed at the end of said frame period such that said ones of said plurality of pixels associated with said one of said respective pairs of first signal lines supplied with said first signal produce luminance lower than that produced during said at least one of said at least two scanning periods disposed at the beginning of said frame period.

12. A display device comprising:

a pixel array having a plurality of pixels arranged in rows extending in a first direction and columns extending in a second direction intersecting said first direction,

each of said plurality of pixels being provided with a switching element;

a plurality of first signal lines extending in said first direction and arranged in said second direction,

each of said plurality of first signal lines supplying a first signal to said switching elements in ones of said plurality of pixels belonging to a corresponding one of said rows;

a plurality of second signal lines extending in said second direction and arranged in said first direction,

each of said plurality of second signal lines for supplying a second signal to at least one of said switching elements in ones of said plurality of pixels belonging to a corresponding one of said columns and supplied with said first signal such that said at least one of said switching elements determines a display state associated therewith;

a first drive circuit for supplying said first signal to each of said plurality of first signal lines;

a second drive circuit for supplying said second signal to each of said plurality of second signal lines; and

a display control circuit for (i) generating a timing signal for determining a timing for said first drive circuit to output said first signal, and (ii) generating video data used for generation of said second signal by said second drive circuit, based upon video information per frame period, wherein

said plurality of first signal lines are divided into a plurality of groups each comprising successive N first signal lines of said plurality of first signal lines, where N is a natural number equal to or greater than 1,

said first drive circuit repeats at least two scannings during one frame period, each of said at least two scannings supplying said first signal to said plurality of groups of the first signal lines successively,

all of said first signal lines of each of said plurality of groups being supplied with said first signal at one time,

said second drive circuit generates said second voltage corresponding to said video data and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of said first signal lines supplied with said first signal during at least one of said two scannings at a beginning of said one frame period, and

said second drive circuit generates said second voltage and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of said first signal lines supplied with said first signal during at least one of said at least two scannings at an end of said one frame period such that said ones of said plurality of pixels associated with said one of said plurality of groups of said first signal lines supplied with said first signal produce luminance lower than that produced during said at least one of said at least two scannings at the beginning of said frame period, and

said display control circuit supplies said video data divided in plural groups and in parallel with each other to said second drive circuit per frame period.

13. A display device according to claim 12, wherein said video information which said display control circuit receives per frame period is video information per field period transmitted in an interlaced scanning system.

14. A display device according to claim 12, wherein said video information which said display control circuit receives per frame period is video information per field period transmitted in a progressive scanning system.

15. A display device comprising:

a pixel array having a plurality of pixels arranged in rows extending in a first direction and columns extending in a second direction intersecting said first direction,

each of said plurality of pixels being provided with a switching element;

a plurality of first signal lines extending in said first direction and arranged in said second direction,

each of said plurality of first signal lines supplying a first signal to said switching elements in ones of said plurality of pixels belonging to a corresponding one of said rows;

a plurality of second signal lines extending in said second direction and arranged in said first direction,

each of said plurality of second signal lines for supplying a second signal to at least one of said switching elements in ones of said plurality of pixels belonging to a corresponding one of said columns and supplied with said first signal such that said at least one of said switching elements determines a display state associated therewith;

a first drive circuit for supplying said first signal to each of said plurality of first signal lines;

a second drive circuit for supplying said second signal to each of said plurality of second signal lines; and

a display control circuit for (i) generating a timing signal for determining a timing for said first drive circuit to output said first signal, and (ii) generating video data used for generation of said second signal by said second drive circuit, based upon video information per frame period, wherein

said first drive circuit supplies said first signal to a plurality of first-kind groups successively at least two times during one of two successive frame periods, and supplies said first signal to a plurality of second-kind groups successively at least two times during another of said two successive frame periods,

a respective one of said plurality of first-kind groups comprising plural adjacent ones of said plurality of first signal lines,

a respective one of said plurality of second-kind groups comprising plural adjacent ones of said plurality of first signal lines, said respective one of said second-kind groups of first signal lines differing from said respective one of said first-kind groups of first signal lines,

all of said first signal lines of each of said first-kind and second-kind groups being supplied with said first signal at one time,

said second drive circuit generates said second voltage corresponding to said video data and supplies said second voltage to ones of said plurality of pixels associated with one of said first-kind and second-kind groups of the first signal lines supplied with said first signal at at least one of said at least two times of supplying said first signal at a beginning of each of said one and another of said two successive frame periods, and

said second drive circuit generates said second voltage and supplies said second voltage to ones of said plurality of pixels associated with one of said first-kind and second-kind groups of the first signal lines supplied with said first signal at at least one of said at least two times of supplying said first signal at an end of each of said one and another of said two successive frame periods such that said ones of said plurality of pixels associated with said one of said first-kind and second-kind groups of the first signal lines supplied with said first signal produce luminance lower than that produced at said at least one of said at least two times of supplying said first signal at said beginning of each of said one and another of said two successive frame periods.

16. A display device according to claim 15, wherein said video information which said display control circuit receives per frame period is video information per field period transmitted in an interlaced scanning system.

17. A display device according to claim 15,

wherein

said video information which said display control circuit receives per frame period is video information per field period transmitted in a progressive scanning system,

said display control circuit generates said video data per frame period based upon a first video information group and a second video information group alternately on successive frames from said video information,

said first video information group corresponds to odd-numbered ones of said rows of said pixels, and

said second video information group corresponds to even-numbered ones of said rows of said pixels.

18. A display device according to claim 15, wherein

said respective one of said plurality of second-kind groups comprises N plural adjacent ones of said plurality of first signal lines, where N is a natural number equal to or greater than 2, and

said respective one of said plurality of first-kind groups is displaced by n lines of said first signal lines from one of said plurality of second-kind groups which is nearest to said respective one of said plurality of first-kind groups, where n is a natural number smaller than N.

19. A display device according to claim 18, wherein said plurality of second-kind groups further comprise a group comprising one of (i) one of said first signal lines, (ii) (N−

n) of said first signal lines, and (iii) (N+n) of said first signal lines.

20. A display device comprising:

a pixel array having a plurality of pixels arranged in rows extending in a first direction and columns extending in a second direction intersecting said first direction,

each of said plurality of pixels being provided with a switching element;

a plurality of first signal lines extending in said first direction and arranged in said second direction,

each of said plurality of first signal lines supplying a first signal to said switching elements in ones of said plurality of pixels belonging to a corresponding one of said rows;

a plurality of second signal lines extending in said second direction and arranged in said first direction,

each of said plurality of second signal lines for supplying a second signal to at least one of said switching elements in ones of said plurality of pixels belonging to a corresponding one of said columns and supplied with said first signal such that said at least one of said switching elements determines a display state associated therewith;

a first drive circuit for supplying said first signal to each of said plurality of first signal lines;

a second drive circuit for supplying said second signal to each of said plurality of second signal lines; and

a display control circuit for (i) generating a timing signal for determining a timing for said first drive circuit to output said first signal, and (ii) generating video data used for generation of said second signal by said second drive circuit and blanking data for producing a gray scale level lower than a gray scale level produced by said video data, based upon video information per two successive frame periods, wherein

said plurality of first signal lines are divided into a plurality of groups each comprising plural adjacent ones of said plurality of first signal lines,

said first drive circuit supplies said first signal to said plurality of groups successively at least two times during each of a first frame period of said two successive frame periods and a second frame period of said two successive frame periods succeeding said first frame period, all of said first signal lines of each of said plurality of groups being supplied with said first signal at one time,

said second drive circuit generates said second voltage corresponding to said video data and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of said first signal lines supplied with said first signal at at least one of said at least two times of supplying said first signal in a former half of each of said two successive frame periods, and

said second drive circuit generates said second voltage based upon said blanking data and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of said first signal lines supplied with said first signal at at least one of said at least two times of supplying said first signal in a latter half of each of said two successive frame periods such that said ones of said plurality of pixels associated with said one of said plurality of groups of said first signal lines supplied with said first signal produce luminance lower than that produced at said at least one of said at least two times of supplying said first signal in said former half of said each of said two successive frame periods, and

said display control circuit compares a second one of said video information corresponding to said second frame period with a first one of said video information corresponding to said first frame period, and generate said blanking data used in said latter half of said first frame period such that said blanking data provides luminance in ones of said plurality of pixels exhibiting a difference in gray scale level between said first and second ones of said video information, different from luminance in a remainder of said plurality of pixels.

21. A display device comprising:

a pixel array having a plurality of pixels arranged in rows extending in a first direction and columns extending in a second direction intersecting said first direction,

each of said plurality of pixels being provided with a switching element;

a plurality of first signal lines extending in said first direction and arranged in said second direction,

each of said plurality of first signal lines supplying a first signal to said switching elements in ones of said plurality of pixels belonging to a corresponding one of said rows;

a plurality of second signal lines extending in said second direction and arranged in said first direction,

each of said plurality of second signal lines for supplying a second signal to at least one of said switching elements in ones of said plurality of pixels belonging to a corresponding one of said columns and supplied with said first signal such that said at least one of said switching elements determines a display state associated therewith;

a first drive circuit for supplying said first signal to each of said plurality of first signal lines;

a second drive circuit for supplying said second signal to each of said plurality of second signal lines; and

a display control circuit for (i) generating a timing signal for determining a timing for said first drive circuit to output said first signal, and (ii) generating video data used for generation of said second signal by said second drive circuit and blanking data for producing a gray scale level lower than a gray scale level produced by said video data, based upon video information per two successive frame periods, wherein

said plurality of first signal lines are divided into a plurality of groups each comprising plural adjacent ones of said plurality of first signal lines,

said first drive circuit supplies said first signal to said plurality of groups successively at least two times during each of a first frame period of said two successive frame periods and a second frame period of said two successive frame periods succeeding said first frame period, all of said first signal lines of each of said plurality of groups being supplied with said first signal at one time,

said second drive circuit generates said second voltage corresponding to said video data and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of said first signal lines supplied with said first signal at at least one of said at least two times of supplying said first signal in a former half of each of said two successive frame periods, and

said second drive circuit generates said second voltage based upon said blanking data and supplies said second voltage to ones of said plurality of pixels associated with one of said plurality of groups of said first signal lines supplied with said first signal at at least one of said at least two times of supplying said first signal in a latter half of each of said two successive frame periods such that said ones of said plurality of pixels associated with said one of said plurality of groups of said first signal lines supplied with said first signal produce luminance lower than that produced at said at least one of said at least two times of supplying said first signal in said former half of said each of said two successive frame periods, and

said display control circuit compares a second one of said video information corresponding to said second frame period with a first one of said video information corresponding to said first frame period, and generate said video data used in said former half of said second frame period such that said video data enhances a difference in gray scale level between said first and second ones of said video information in ones of said plurality of pixels exhibiting said difference.

22. A method of driving a display device,

said display device including a pixel array having a plurality of pixels arranged in rows extending in a first direction and columns extending in a second direction intersecting said first direction,

a plurality of first signal lines extending in said first direction and arranged in said second direction, and

a plurality of second signal lines extending in said second direction and arranged in said first direction,

said method comprising:

generating a video signal to be supplied to each of said plurality of pixels, and a scanning signal for determining a timing for supplying said video signals to said plurality of pixels, based upon video information per frame period supplied to said display device;

selecting said rows of said pixels successively during said frame period by outputting said scanning signal to respective ones of said plurality of first signal lines; and

supplying said video signals to ones of said plurality of pixels belonging to said selected rows of said pixels via said plurality of second signal lines, wherein

said plurality of first signal lines are divided into a plurality of groups each comprising plural adjacent ones of said plurality of first signal lines,

said method includes;

at least two scanning steps for outputting said scanning signal to said plurality of groups of said first signal lines successively, during said frame period,

all of said first signal lines of each of said plurality of groups being supplied with said scanning signal at one time;

supplying said video signals to ones of said plurality of pixels associated with one of said plurality of groups of first signal lines supplied with said scanning signal by at least one of said at least two scanning steps disposed at a beginning of said frame period, and

supplying a voltage to ones of said plurality of pixels associated with one of said plurality of groups of first signal lines supplied with said scanning signal by at least one of said at least two scanning steps disposed at an end of said frame period such that said ones of said plurality of pixels associated with said one of said plurality of groups of first signal lines supplied with said scanning signal produce luminance lower than that produced during said at least one of said at least two scanning steps disposed at the beginning of said frame period.