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Ultra-high bandwidth multi-port memory system for image scaling applications

  • US 6,903,733 B1
  • Filed: 04/01/2003
  • Issued: 06/07/2005
  • Est. Priority Date: 11/24/1997
  • Status: Expired due to Term
First Claim
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1. A pixelated display controller integrated circuit, comprising:

  • an image scalar to change a size of a digital image;

    a frame memory coupled to the image scalar to store frames of the digital image; and

    a plurality of buffers to provide the image scalar parallel access to portions of frames of the digital image stored in the frame memory.

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