Method of manufacturing semiconductor device capable of sensing dynamic quantity

• US 6,906,394 B2
• Filed: 05/30/2003
• Issued: 06/14/2005
• Est. Priority Date: 05/28/2001
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Fukada, Tsuyoshi, Takeuchi, Yukihiro, Kano, Kazuhiko, Sakai, Minekazu, Muto, Hiroshi, Ao, Kenichi, Oohara, Junji
• Primary Examiner(s): Prenty, Mark V.
• Application Number:
  US10/448,277
• Publication Number:
  US 20030201506A1
• Time in Patent Office: 746 Days
• Field of Search: 735/143.2, 257/415, 257/347, 257/619
• US Class Current: 257/415
• CPC Class Codes: B81B 2203/0136 Comb structures
• CPC Class Codes: B81C 1/0019 Flexible or deformable structures not provided for in groups B81C1/00142 - B81C1/00182
• CPC Class Codes: B81C 1/00531 Dry etching
• CPC Class Codes: B81C 1/00936 Releasing the movable structure without liquid etchant
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: G01P 2015/0814 for translational movement of the mass, e.g. shuttle type
• CPC Class Codes: H01L 21/76232 of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls H01L21/76229 takes precedence
• CPC Class Codes: H01L 21/76264 SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
• CPC Class Codes: H01L 21/76283 Lateral isolation by refilling of trenches with dielectric material

Abstract

A method of manufacturing a semiconductor device is provided. The device is manufactured with use of an SOI (Silicon On Insulator) substrate having a first silicon layer, an oxide layer, and a second silicon layer laminated in this order. After forming a trench reaching the oxide layer from the second silicon layer, dry etching is performed, thus allowing the oxide layer located at the trench bottom to be charged at first. This charging forces etching ions to impinge upon part of the second silicon layer located laterally to the trench bottom. Such part is removed, forming a movable section. For example, ions to neutralize the electric charges are administered into the trench, so that the electric charges are removed from charged movable electrodes and their charged surrounding regions. Removing the electric charges prevents the movable section to stick to its surrounding portions.

Claims

1. A semiconductor device comprising:

a substrate including;

a first semiconductor layer;

an insulation layer formed on the first semiconductor layer; and

a second semiconductor layer formed on the insulation layer and having a trench extending to the insulation layer from a surface of the second semiconductor layer;

a plurality of anchor portions secured on the insulation layer;

a movable section formed in the trench and including a mass portion supported on opposite ends thereof by the plurality of anchor portions via beam portions;

a plurality of first electrodes integrally formed with the mass portion and protruding therefrom; and

a plurality of fixed sections formed in the trench, each of the fixed sections including a wiring portion secured on the insulation layer and a plurality of second electrodes integrally formed with the wiring portion and protruding therefrom to interleave with the plurality of first electrodes;

wherein the plurality of first electrodes is displaceable in response to an applied dynamic quantity, and at least one of the anchor portions and the wiring portion of each of the plurality of fixed sections has a bottom-most portion that is narrower than a surface portion thereof.

2. The semiconductor device of claim 1, wherein a region of the movable section that faces the insulation layer is separated from the insulation layer.

3. The semiconductor device of claim 1, wherein each of the plurality of fixed sections is connected to the insulation layer.

4. The semiconductor device of claim 1, wherein the trench is void of electric charges caused due to charging of the insulation layer.

5. A semiconductor device comprising:

a substrate including a first semiconductor layer, an insulation layer formed on the first semiconductor layer and a second semiconductor layer formed on the insulation layer, the substrate defining a trench reaching the insulation layer from a surface of the second semiconductor layer;

a plurality of anchor portions secured on the insulation layer;

a movable section including a mass portion supported on opposite ends thereof by the plurality of anchor portions via beam portions and a plurality of first electrodes integrally formed with the mass portion and protruding therefrom, the mass portion and the beam portions being separated from the insulation layer in the trench and being displaceable in response to an applied dynamic quantity; and

fixed sections each including a wiring portion secured on the insulation layer and a plurality of second electrodes integrally formed with the wiring portion and protruding therefrom to interleave with the plurality of first electrodes;

wherein at least one of opposing surfaces of the movable section and the insulation layer is roughened.

6. The semiconductor device of claim 5, wherein the trench is void of electric charges.