Re-writable memory with multiple memory layers
First Claim
Patent Images
1. A re-writable memory comprising:
- a plurality of x-direction conductive layers, each conductive layer being patterned to form conductive array lines in a first direction;
a plurality of y-direction conductive layers, each conductive layer being patterned to form conductive array lines in a second direction orthogonal to the first direction; and
a plurality of memory cell arrays, each one defined in-between an x-direction conductive layer and a y-direction conductive layer, each memory cell array being accessible for reading or writing through selection of an x-direction conductive layer operably connected to the memory cell array; and
a y-direction conductive layer operably connected to the memory cell array;
wherein the selection of only one conductive layer is not sufficient to access a memory cell array for either reading or writing.
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Abstract
A re-writable memory with multiple memory layers. Using both terminals of a memory cell in a stacked cross point structure for selection purposes allows multiple layers of conductive lines to be selected as long as there is only one memory cell that has two terminals selected. Sharing logic over multiple layers allows driver sets to be reused.
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Citations
26 Claims
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1. A re-writable memory comprising:
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a plurality of x-direction conductive layers, each conductive layer being patterned to form conductive array lines in a first direction;
a plurality of y-direction conductive layers, each conductive layer being patterned to form conductive array lines in a second direction orthogonal to the first direction; and
a plurality of memory cell arrays, each one defined in-between an x-direction conductive layer and a y-direction conductive layer, each memory cell array being accessible for reading or writing through selection of an x-direction conductive layer operably connected to the memory cell array; and
a y-direction conductive layer operably connected to the memory cell array;
wherein the selection of only one conductive layer is not sufficient to access a memory cell array for either reading or writing. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A re-writable memory comprising:
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a plurality of conductive line arrays;
a plurality of driver sets that drive the conductive line arrays, each driver set using a selection logic to drive the conductive line arrays, wherein at least two conductive line arrays are driven by the same selection logic; and
a plurality of memory cell arrays, each memory cell array being in electrical contact with two conductive line arrays and requiring both of those conductive line arrays to be driven by their appropriate driver sets in order to access the memory cell array for reading and writing purposes, whereby a memory cell array cannot be read from or written to by a single conductive line array being driven. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A re-writable memory comprising:
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at least three x-direction conductive layers, each conductive layer being patterned to form conductive array lines in a first direction, wherein at least two x-direction conductive layers are driven by the same logic;
at least two y-direction conductive layers, each conductive layer being patterned to form conductive array lines in a second direction orthogonal to the first direction;
at least four memory cell arrays, each memory cell array being operably connected to one x-direction conductive layer and one y-direction conductive layer. - View Dependent Claims (19, 20, 21, 22, 23)
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24. A re-writable memory comprising:
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a plurality of x-direction conductive layers, each conductive layer being patterned to form conductive array lines in a first direction;
a least one y-direction conductive layer, each conductive layer being patterned to form conductive array lines in a second direction orthogonal to the first direction; and
a plurality of memory cell arrays, each one defined in-between an x-direction conductive layer and a y-direction conductive layer, each memory cell array being accessible for reading or writing through selection of an x-direction conductive layer operably connected to the memory cell array; and
a y-direction conductive layer operably connected to the memory cell array, wherein each memory cell is defined by at least a memory plug placed at or near the intersection of one x-direction conductive array line and one y-direction conductive array line. - View Dependent Claims (25, 26)
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Specification