On-chip impedance matching power amplifier and radio applications thereof

• US 6,907,231 B2
• Filed: 04/15/2002
• Issued: 06/14/2005
• Est. Priority Date: 04/15/2002
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Bhatti, Iqbal S.
• Primary Examiner(s): VO, NGUYEN THANH
• Application Number:
  US10/122,458
• Publication Number:
  US 20030194976A1
• Time in Patent Office: 1,156 Days
• Field of Search: 455/127.1, 455/129, 455/91, 455/95, 455/107, 455/120, 455/121, 333/32
• US Class Current: 455/127.1
• CPC Class Codes: H04B 1/0458 Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages matching circuits in general H03H

Abstract

An on-chip impedance matching includes a transistor, an inductor, and a capacitive divider. The gate of the transistor is operably coupled to receive input signals; the source of the transistor is coupled to a first DC voltage potential; and the drain of the transistor is operably coupled to the inductor. The other end of the inductor is operably coupled to a second DC voltage potential. The capacitive divider includes matched capacitors that, in combination with the inductor, provide for substantially lossless on-chip impedance matching, where a tap of the capacitive divider provides an output of the on-chip impedance matching power amplifier. In addition, the capacitance of the capacitive divider and the inductance of the inductor are tuned to provide a tank circuit for the on-chip impedance matching power amplifier.

Claims

1. An on-chip impedance matching power amplifier comprises:

transistor having a gate, a source, and a drain, wherein the gate is operably coupled to receive an input signal, and wherein the source is coupled to a first DC voltage potential;

an inductor operably coupled to the drain of the transistor and to a second DC voltage potential; and

capacitive divider operably coupled to the drain of the transistor and to the first DC voltage potential, wherein a tap of the capacitive divider provides an output of the on-chip impedance matching power amplifier, wherein capacitance of the capacitive divider and inductance of the inductor are tuned to provide a tank circuit for the on-chip impedance matching power amplifier and impedance matching with a load of the on-chip impedance matching power amplifier.

2. The on-chip impedance matching power amplifier of claim 1 further comprises:

second transistor having a second gate, a second source, and a second drain, wherein the second gate is operably coupled to receive one leg of the input signal, and wherein the second source is coupled to the first DC voltage potential;

a second inductor operably coupled to the second drain of the second transistor and to the second DC voltage potential; and

second capacitive divider operably coupled to the second drain of the second transistor and to the first DC voltage potential, wherein a tap of the second capacitive divider provides one leg of the output of the on-chip impedance matching power amplifier, wherein capacitance of the second capacitive divider and inductance of the second inductor are tuned to provide a second tank circuit for the on-chip impedance matching power amplifier and impedance matching with the load of the on-chip impedance matching power amplifier.

3. The on-chip impedance matching power amplifier of claim 1 further comprises:

the inductor including an impedance loss sized to provide one termination of the impedance matching.

4. The on-chip impedance matching power amplifier of claim 1, wherein the capacitive divider further comprises:

first capacitor coupled between the output and the drain of the transistor; and

second capacitor coupled in parallel with the load.

5. A radio transmitter comprises:

up-conversion module operably coupled to convert a baseband signal into a radio frequency (RF) signal based on at least one local oscillation;

power amplifier operably coupled to produce an amplified RF signal by amplifying the RF signal, wherein the power amplifier includes;

transistor having a gate, a source, and a drain, wherein the gate is operably coupled to receive the RF signal, and wherein the source is coupled to a first DC voltage potential;

an inductor operably coupled to the drain of the transistor and to a second DC voltage potential; and

capacitive divider operably coupled to the drain of the transistor and to the first DC voltage potential, wherein a tap of the capacitive divider provides an output of the power amplifier, wherein capacitance of the capacitive divider and inductance of the inductor are tuned to provide a tank circuit for the power amplifier and impedance matching with impedance of an antenna;

filtering module operably coupled to produce a filtered RF signal by filtering the amplified RF signal; and

the antenna operably coupled to transmit the filtered RF signal.

6. The radio transmitter of claim 5, wherein the power amplifier further comprises:

second transistor having a second gate, a second source, and a second drain, wherein the second gate is operably coupled to receive one leg of the RF signal, and wherein the second source is coupled to the first DC voltage potential;

a second inductor operably coupled to the second drain of the second transistor and to the second DC voltage potential; and

second capacitive divider operably coupled to the second drain of the second transistor and to the first DC voltage potential, wherein a tap of the second capacitive divider provides one leg of the output of the power amplifier, wherein capacitance of the second capacitive divider and inductance of the second inductor are tuned to provide a second tank circuit for the power amplifier and impedance matching with the impedance of the antenna.

7. The radio transmitter of claim 5, wherein the power amplifier further comprises:

the inductor including an impedance loss sized to provide one termination of the impedance matching.

8. The radio transmitter of claim 5, wherein the capacitive divider further comprises:

first capacitor coupled between the output and the drain of the transistor; and

second capacitor coupled in parallel with the antenna.

9. An on-chip impedance matching power amplifier comprises:

transistor having a gate, a source, and a drain, wherein the gate is operably coupled to receive an input signal, and wherein the drain is coupled to a first DC voltage potential;

an inductor operably coupled to the source of the transistor and to a second DC voltage potential; and

capacitive divider operably coupled to the source of the transistor and to the second DC voltage potential, wherein a tap of the capacitive divider provides an output of the on-chip impedance matching power amplifier, wherein capacitance of the capacitive divider and inductance of the inductor are tuned to provide a tank circuit for the on-chip impedance matching power amplifier and impedance matching with a load of the on-chip impedance matching power amplifier.

10. The on-chip impedance matching power amplifier of claim 9 further comprises:

second transistor having a second gate, a second source, and a second drain, wherein the second gate is operably coupled to receive one leg of the input signal, and wherein the second drain is coupled to the first DC voltage potential;

a second inductor operably coupled to the second source of the second transistor and to the second DC voltage potential; and

second capacitive divider operably coupled to the second source of the second transistor, wherein a tap of the second capacitive divider provides one leg of the output of the on-chip impedance matching power amplifier, wherein capacitance of the second capacitive divider and inductance of the second inductor are tuned to provide a second tank circuit for the on-chip impedance matching power amplifier and impedance matching with the load of the on-chip impedance matching power amplifier.

11. The on-chip impedance matching power amplifier of claim 9 further comprises:

the inductor including an impedance loss sized to provide one termination of the impedance matching.

12. The on-chip impedance matching power amplifier of claim 9, wherein the capacitive divider further comprises:

first capacitor coupled between the output and the source of the transistor; and

second capacitor coupled in parallel with the load.

13. A radio transmitter comprises:

up-conversion module operably coupled to convert a baseband signal into a radio frequency (RF) signal based on at least one local oscillation;

power amplifier operably coupled to produce an amplified RF signal by amplifying the RF signal, wherein the power amplifier includes;

transistor having a gate, a source, and a drain, wherein the gate is operably coupled to receive an input signal, and wherein the drain is coupled to a first DC voltage potential;

an inductor operably coupled to the source of the transistor and to a second DC voltage potential; and

capacitive divider operably coupled to the source of the transistor and to the second DC voltage potential, wherein a tap of the capacitive divider provides an output of the on-chip impedance matching power amplifier, wherein capacitance of the capacitive divider and inductance of the inductor are tuned to provide a tank circuit for the on-chip impedance matching power amplifier and impedance matching with a load of the on-chip impedance matching power amplifier;

filtering module operably coupled to produce a filtered RF signal by filtering the amplified RF signal; and

an antenna operably coupled to transmit the filtered RF signal.

14. The radio transmitter of claim 13, wherein the power amplifier further comprises:

second transistor having a second gate, a second source, and a second drain, wherein the second gate is operably coupled to receive one leg of the RF signal, and wherein the second drain is coupled to the first DC voltage potential;

a second inductor operably coupled to the second source of the second transistor and to the second DC voltage potential; and

second capacitive divider operably coupled to second source of the second transistor, wherein a tap of the second capacitive divider provides one leg of the output of the power amplifier, wherein capacitance of the second capacitive divider and inductance of the second inductor are tuned to provide a second tank circuit for the power amplifier and impedance matching with the impedance of the antenna.

15. The radio transmitter of claim 13, wherein the power amplifier further comprises:

the inductor including an impedance loss sized to provide one termination of the impedance matching.

16. The radio transmitter of claim 13, wherein the capacitive divider further comprises:

first capacitor coupled between the output and the source of the transistor; and

second capacitor coupled in parallel with the antenna.