METHOD OF REGULATING AN OUTPUT VOLTAGE OF A POWER CONVERTER BY CALCULATING A CURRENT VALUE TO BE APPLIED TO AN INDUCTOR DURING A TIME INTERVAL IMMEDIATELY FOLLOWING A VOLTAGE SENSING TIME INTERVAL AND VARYING A DUTY CYCLE OF A SWITCH DURING THE TIME INTERVAL FOLLOWING THE VOLTAGE SENSING TIME INTERVAL

• US 6,909,266 B2
• Filed: 11/14/2002
• Issued: 06/21/2005
• Est. Priority Date: 11/14/2002
• Status: Expired due to Term

• Current Assignee: Exar Corporation (Maxlinear Incorporated)
• Original Assignee: FYRE Storm Incorporated (Maxlinear Incorporated)
• Inventors: Fraser, David F., Roan, Jack, Kernahan, Kent
• Primary Examiner(s): Nguyen, Matthew V.
• Application Number:
  US10/296,000
• Publication Number:
  US 20040095119A1
• Time in Patent Office: 950 Days
• Field of Search: 323/222, 323/223, 323/226, 323/265, 323/268, 323/271, 323/273, 323/282, 323/285
• US Class Current: 323/282
• CPC Class Codes: G05F 3/262 using field-effect transistors only
• CPC Class Codes: H02J 2207/20 Charging or discharging characterised by the power electronics converter
• CPC Class Codes: H02M 1/0012 Control circuits using digital or numerical techniques in DC/DC converters H02M3/157, H02M3/33515; in DC-AC converters H02M7/53873
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 1/008 Plural converter units for generating at two or more independent and non-parallel outputs, e.g. systems with plural point of load switching regulators
• CPC Class Codes: H02M 1/0845 digitally controlled (or with digital control)
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/157 with digital control
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H03M 5/08 Code representation by pulse width
• CPC Class Codes: H05B 41/2828 using control circuits for the switching elements H05B41/2827 takes precedence
• CPC Class Codes: Y02B 20/00 Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The output voltage of a power converter is regulated by comparing the output voltage to a target output voltage during a first time interval and calculating an inductor current required in a second time interval immediately following the first time interval to increase the output voltage to the target output voltage in the second time interval. The duty cycle of a switch in the power converter is varied to modify the current in the inductor during the second time interval according to the calculated next current and a saturation current of the inductor. In one embodiment the power converter includes a reference resistor. By measuring the voltage across the reference resistor at certain times various parameters, including coil inductance and capacitor capacitance, are calculated. In some embodiments a linear model of the power converter is used.

Claims

1. A method for regulating an output voltage applied to a load at an output terminal of a power converter, the power converter including an output capacitor coupled between the output terminal and a ground reference, an inductor that is selectably coupled by a switch between a power supply and the ground reference, the method comprising:

sensing the output voltage during a first time interval;

calculating a next current value in the inductor sufficient to bring the output voltage to a target voltage within a second time interval immediately following the first time interval; and

varying a duty cycle of the switch to modify the current in the inductor during the second time interval, according to the calculated next current and a saturation current of the inductor, the duty cycle being the portion of the second time interval during which the switch couples the inductor to the power supply.

2. A method as in claim 1, wherein the first and second time intervals are of the same duration.

3. A method as in claim 1 further comprising, during a third time interval subsequent to the second time interval, varying the duty cycle in the third time interval such that an average in the current in the inductor is substantially equal to an average in a current drawn by the load.

4. A method as in claim 2, wherein the output voltage and the target voltage are substantially equal at the beginning of the third time interval.

5. A method as in claim 1 wherein, when the duty cycle corresponding the calculated next current is less than a predetermined minimum value, the method applies the minimum value to the switch during the second time interval and maintains a 0% duty cycle during one or more time interval subsequent to the second time interval.

6. A method as in claim 1, further comprising computing an inductance value for the inductor by varying the duty cycle and measuring the resulting current across the inductor.

7. A method as in claim 1, further comprising computing a capacitance value for the output capacitor by varying the duty cycle and measuring a change in voltage across the capacitor over a time interval.

8. A method as in claim 1, further comprising calculating an efficiency value using the duty cycle, the output voltage and an input voltage.

9. A method as in claim 1, wherein the power converter further includes a reference resistor, further comprising calculating an average inductor current using the duty cycle and voltages across the reference resistor sampled immediately prior to a closing and an opening of the switch.

10. A method as in claim 9, further comprising calculating a ripple voltage from samples of the output voltage.

11. A method as in claim 10, further comprising calculating a parasitic resistance of the output capacitor using the average current and the ripple voltage.

12. A method as in claim 1, wherein the power converter further includes a reference resistor, further comprising calculating a parasitic resistance in the switch from the input voltage and a voltage of the reference resistor.

13. A method as in claim 1, further comprising calculating an efficiency loss based on efficiency values calculated using the same duty cycle and time intervals of different durations.

14. A method as in claim 1, wherein when the difference between the output voltage sensed in the first time interval and the target voltage is less than a predetermined value, the duty cycle in the second time interval is not varied.

15. A method as in claim 1, wherein the duty cycle is varied by less than an amount necessary to bring the output voltage to the target voltage.

16. A method as in claim 15, wherein the duty cycle is varied by an amount according to the magnitude of the difference between the output voltage sensed during the first time interval and the target voltage.

17. A method as in claim 16, wherein the duty cycle is varied by an amount greater than proportionally to the magnitude of the difference between the output voltage sensed during the first time interval and the target voltage.

18. A method as in claim 1, wherein the duty cycle is varied by less than a predetermined amount that is less than 100%.

19. A method as in claim 1, wherein the duty cycle is varied by more than a predetermined amount that is greater than 0%.

20. A method as in claim 1 wherein, when the difference between the sensed output voltage and the target voltage value is less than a predetermined amount, the duty cycle is not varied during the second time interval, the method further comprises:

accumulating the difference over a plurality of time intervals and

varying the duty cycle to modify the current in the inductor when the accumulated difference exceeds a predetermined value.

21. A method as in claim 1 wherein, when the difference between the sensed output voltage and the target voltage value is less than a predetermined amount, the duty cycle is not varied during the second time interval, the method further comprises:

monitoring the difference over a plurality of time intervals and

varying the duty cycle to modify the current in the inductor at a subsequent time interval when the difference persists over the plurality of time intervals.

30. A method as in claim 1, wherein varying a duty cycle of the switch varies the duty cycle to achieve an equilibrium condition.

31. A method as in claim 30, wherein the equilibrium condition comprises a condition in which the output voltage substantially equals the target voltage.

32. A method as in claim 31, wherein the equilibrium condition further comprises a condition in which the inductor current is substantially equal to a load current.

33. A method as in claim 32, wherein the equilibrium condition further comprises a condition in which the inductor current is maintained substantially constant.

22. A method for regulating an output voltage applied to a load at an output terminal of a power converter, the power converter including an output capacitor coupled between the output terminal and a ground reference, an inductor that is selectably coupled by a switch between a power supply and the ground reference, the method comprising:

sensing the output voltage during a first time interval;

calculating a next current value in the inductor according to a linear model of the power converter, the next current value being sufficient to bring the output voltage to a target voltage within a second time interval immediately following the first time interval; and

varying a duty cycle of the switch to modify the current in the inductor during the second time interval, according to the calculated next current and a saturation current of the inductor, the duty cycle being the portion of the second time interval during which the switch couples the inductor to the power supply.

23. A method as in claim 22, wherein the duty cycle is varied in further accordance with a second next current value calculated to be achieved by a 100% duty cycle.

24. A method as in claim 22, wherein the duty cycle is varied in further accordance with a second next current value calculated to be removable subsequently by operating at a 0% duty cycle.

25. A method as in claim 22, wherein the linear model predicts the next current value based on an incremental change of the present current in the inductor.

26. A method as in claim 25, wherein the next current value is weighted by the current duty cycle.

27. A method as in claim 26, wherein the first and second intervals are substantially shorter than the period of the highest fundamental frequency of the power converter.

28. A method as in claim 22, further comprising computing a load current.

29. A method as in claim 22, further comprising predicting a voltage on the output capacitor.

34. A method as in claim 22 wherein, when the duty cycle corresponding the calculated next current is less than a predetermined minimum value, the method applies the minimum value to the switch during the second time interval and maintains a 0% duty cycle during one or more time interval subsequent to the second time interval.

35. A method as in claim 22, further comprising computing an inductance value for the inductor by varying the duty cycle and measuring the resulting voltage across the inductor.

36. A method as in claim 22, further comprising computing a capacitance value for the output capacitor by varying the duty cycle and measuring a change in voltage across the capacitor over a time interval.

37. A method as in claim 22, further comprising calculating an efficiency value using the duty cycle, the output voltage and an input voltage.

38. A method as in claim 37, further comprising calculating a ripple voltage from samples of the output voltage.

39. A method as in claim 38, further comprising calculating a parasitic resistance of the output capacitor using the average current and the ripple voltage.

40. A method as in claim 22, wherein the power converter further includes a reference resistor, further comprising calculating a parasitic resistance in the switch from the input voltage and a voltage of the reference resistor.

41. A method as in claim 22, further comprising calculating an efficiency loss based on efficiency values calculated using the same duty cycle and time intervals of different durations.

42. A method as in claim 22, wherein when the difference between the output voltage sensed in the first time interval and the target voltage is less than a predetermined value, the duty cycle in the second time interval is not varied.

43. A method as in claim 22, wherein the duty cycle is varied by less than an amount necessary to bring the output voltage to the target voltage.

44. A method as in claim 43, wherein the duty cycle is varied by an amount according to the magnitude of the difference between the output voltage sensed during the first time interval and the target voltage.

45. A method as in claim 44, wherein the duty cycle is varied by an amount greater than proportionally to the magnitude of the difference between the output voltage sensed during the first time interval and the target voltage.

46. A method as in claim 22, wherein the duty cycle is varied by less than a predetermined amount that is less than 1.

47. A method as in claim 22, wherein the duty cycle is varied by more than a predetermined amount that is greater than 0.

48. A method as in claim 22 wherein, when the difference between the sensed output voltage and the target voltage value is less than a predetermined amount, the duty cycle is not varied during the second time interval, the method further comprises:

accumulating the difference over a plurality of time intervals and

varying the duty cycle to modify the current in the inductor when the accumulated difference exceeds a predetermined value.

49. A method as in claim 22 wherein, when the difference between the sensed output voltage and the target voltage value is less than a predetermined amount, the duty cycle is not varied during the second time interval, the method further comprises:

monitoring the difference over a plurality of time intervals and

varying the duty cycle to modify the current in the inductor at a subsequent time interval when the difference persists over the plurality of time intervals.

50. A method for regulating an output voltage applied to a load at an output terminal of a power converter, the power converter including an output capacitor coupled between the output terminal and a ground reference, an inductor that is selectable and coupled by a switch between a power supply and the ground reference, and a reference resistor for sensing a current in the inductor, the method comprising:

calculating parameter values of a model of the power converter, based on sensing the output voltage and a current in the inductor, the parameter values including one or more of an inductor value of the inductor, a capacitance value of the output capacitor and parasitic resistances of the inductor and the output capacitor; and

thereafter, at each of a plurality of time intervals;

sensing the output voltage during that time interval; and

regulating the output voltage by varying a duty cycle of the switch to modify the current in the inductor during a second time interval subsequent to that time interval, according to the model, the duty cycle being the portion of the second time interval during which the switch couples the inductor to the power supply.

51. A method as in claim 50, wherein the calculating of parameter values comprises computing an inductance value for the inductor by varying the duty cycle and measuring the resulting voltage across the inductor.

52. A method as in claim 50, wherein the calculating of parameter values comprises computing a capacitance value for the output capacitor by varying the duty cycle and measuring a change in voltage across the capacitor over a time interval.

53. A method as in claim 50, wherein the calculating of parameter values comprises calculating an efficiency value using the duty cycle, the output voltage and an input voltage.

54. A method as in claim 50, wherein the calculating of parameter values comprises calculating an average inductor current using the duty cycle and voltages across the reference resistor sampled immediately prior to a closing and an opening of the switch.

55. A method as in claim 54, wherein the calculating of parameter values further comprises calculating a ripple voltage from samples of the output voltage.

56. A method as in claim 55, wherein the calculating of parameter values further comprises calculating a parasitic resistance of the output capacitor using the average current and the ripple voltage.

57. A method as in claim 50, wherein the calculating of parameter values comprises calculating a parasitic resistance in the switch from the input voltage and a voltage of the reference resistor.

58. A method as in claim 50, wherein the calculating of parameter values comprises calculating an efficiency loss based on efficiency values calculated using the same duty cycle and time intervals of different durations.