Display device

• US 6,909,413 B2
• Filed: 10/29/2001
• Issued: 06/21/2005
• Est. Priority Date: 10/27/2000
• Status: Expired due to Term

• Current Assignee: Japan Display Central Incorporated (Japan Display Incorporated)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Senda, Kouji, Takehashi, Shin-itsu, Nanno, Yutaka
• Primary Examiner(s): Shankar, Vijay
• Assistant Examiner(s): Patel, Nitin
• Application Number:
  US10/168,307
• Publication Number:
  US 20020196208A1
• Time in Patent Office: 1,331 Days
• Field of Search: 345/87, 345/92, 345/211, 345/89, 345/94, 345/95, 345/98, 345/99, 345/100, 345/204, 345/210, 315/169.1, 349/19, 349/33, 359/245, 327/536
• US Class Current: 345/87
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2320/0219 Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
• CPC Class Codes: G09G 2330/02 Details of power systems and of start or stop of display operation
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/2051 with use of a spatial dither pattern
• CPC Class Codes: G09G 3/2074 using sub-pixels
• CPC Class Codes: G09G 3/32 semiconductive, e.g. using light-emitting diodes [LED]
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
• CPC Class Codes: H02M 1/009 having two or more independently controlled outputs for DC-DC converter with intermediate AC H02M3/33561
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H04W 52/027 by controlling a display operation or backlight unit
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

The present invention provides a liquid crystal display device having a liquid crystal display portion, a gate driver circuit, a source driver circuit, and a power supply circuit, where the liquid crystal display portion includes unit pixels with pixel switching elements and pixel electrodes arranged in a matrix. The pixel switching elements are thin film transistors that are made of polycrystalline silicon semiconductor formed on an insulating substrate. The power supply circuit is a charge pump-type power supply circuit, is made of a polycrystalline silicon semiconductor, and is a built-in circuit integrally formed on an insulating substrate. With such a configuration, a liquid crystal display device that greatly reduces power consumption is realized.

Claims

1. A display device comprising:

a display portion having unit pixels arranged in a matrix, each unit pixel having a pixel switching element and a pixel electrode;

a gate driver circuit for supplying scan signals to gate lines;

a source driver circuit for supplying image signals to source lines; and

a power supply circuit for generating power supply voltages for driving the gate driver circuit and the source driver circuit from an inputted reference power supply voltage VDD and for supplying the power supply voltages to drive the gate driver circuit and the source driver circuit;

wherein the pixel switching elements are thin film transistors made of a polycrystalline silicon semiconductor formed on an insulating substrate;

the power supply circuit is a charge pump-type power supply circuit and is configured for converting the reference power supply voltage VDD into power supply voltages that are integral multiples of voltage VDD; and

the power supply circuit comprises a polycrystalline silicon semiconductor and is integrally formed on the insulating substrate.

2. The display device according to claim 1, wherein the display portion is a liquid crystal display portion.

3. The display device according to claim 2, further comprising a compensation voltage-applying driver circuit, wherein:

each of the unit pixels comprises a voltage controlling capacitor having two electrodes, one electrode connected to the pixel electrode, and comprises voltage controlling capacitor wiring for supplying a compensation voltage signal connected to the other electrode of the voltage controlling capacitor;

the voltage controlling capacitor wiring is connected to the compensation voltage-applying driver circuit for changing the potential of the compensation voltage signal after completion of writing to each of the pixels to modulate the potentials of the pixel electrodes; and

the power supply circuit for generating power supply voltages for driving the gate driver circuit and the source driver circuit, and for generating a power supply voltage supplied to the compensation voltage-applying driver circuit.

4. The display device according to claim 3, wherein the gate driver circuit, the source driver circuit, and the compensation voltage-applying driver circuit comprising a polycrystalline silicon semiconductor and are integrally formed on the insulating substrate.

5. The display device according to claim 3, wherein Cs is the capacitance value of the voltage controlling capacitor, and Cs satisfies Equation 1:

Cs=(Vbias/Vepp)·

Ctot 

 

(1)

where Vbias is a change in pixel voltage caused by change in the compensation voltage, Vepp is the voltage amplitude of the compensation voltage signal, and Ctot is the sum of the voltage controlling capacitance, parasitic capacitance, and liquid crystal display element capacitance.

6. The display device according to claim 5, wherein the voltage amplitude Vepp of the compensation voltage signal is represented by n times a reference supply voltage inputted to the power supply circuit, where n is a natural number within the range 1≦

n≦

4.

7. The display device according to claim 6, wherein the voltage amplitude of a scan signal is m times the reference power supply voltage, where m is a natural number and is set so that the voltage amplitude of the scan signal is a minimum voltage value in a voltage range in which writing of image signals to the unit pixels is possible.

8. The display device according to claim 1, wherein:

the display portion is an EL display portion for carrying out display with light emitted from EL elements and unit pixels of the EL display portion each comprise, in addition to the switching element and the pixel electrode, a current controlling element for controlling current magnitude to the EL elements; and

the current controlling elements are thin film transistors made of a polycrystalline silicon semiconductor formed on an insulating substrate.

9. The display device according to claim 1, wherein the gate driver circuit and the source driver circuit are made of a polycrystalline silicon semiconductor and are integrally formed on the insulating substrate.

10. The display device according to claim 1, wherein the source driver circuit comprises a monocrystalline silicon semiconductor, and the gate driver circuit comprises a polycrystalline silicon semiconductor and is integrally formed on the insulating substrate.

11. The display device according to claim 1, further comprising a level shifter circuit for supplying control signals to the gate driver circuit and the source driver circuit;

wherein the level shifter circuit comprises a polycrystalline silicon semiconductor and is integrally formed on the insulating substrate.

12. A display device comprising:

a display portion having unit pixels arranged in a matrix;

a gate driver circuit for supplying scan signals to the gate lines;

a source driver circuit for supplying digital image signals to the source lines;

a power supply circuit for generating power supply voltages for driving the gate driver circuit and the source driver circuit from an inputted reference power supply voltage VDD and for supplying the power supply voltages to drive the gate driver circuit and the source driver circuit;

wherein each of the unit pixels is divided into a plurality of sub-pixels, and

each of the sub-pixels has a sub-pixel electrode and a sub-pixel switching element comprising a thin film transistor made of a polycrystalline silicon semiconductor formed on an insulating substrate;

the power supply circuit is a charge pump-type power supply circuit and is configured for converting the reference power supply voltage VDD into power supply voltages that are integral multiples of voltage VDD; and

the power supply circuit comprising a polycrystalline silicon semiconductor and is integrally formed on the insulating substrate.

13. The display device according to claim 12, wherein the display portion is a liquid crystal display portion.

14. The display device according to claim 12, wherein:

the display portion is an EL display portion for carrying out display with light emitted from EL elements and sub-pixels of the EL display portion each comprise, in addition to the sub-pixel switching element and the sub-pixel electrode, a current controlling element for controlling current magnitude to the EL elements; and

the current controlling element is a thin film transistor made of a polycrystalline silicon semiconductor formed on the insulating substrate.

15. The display device according to claim 12, wherein each of the sub-pixel electrodes has an area corresponding to a weighting of the digital image signals.

16. The display device according to claim 12, further comprising gate lines, source lines and a wiring configuration, wherein the wiring configuration is such that the gate lines are wired to each of the sub-pixels and one of the source lines is commonly wired to all of the sub-pixels.

17. The display device according to claim 13, further comprising a compensation voltage driver circuit, wherein:

each of the sub-pixels comprises a sub-pixel electrode and a voltage controlling capacitor having a first electrode and a second electrode, the first electrode connected to the sub-pixel electrode and comprising voltage controlling capacitor wiring for supplying a compensation voltage signal connected to the second electrode of the voltage controlling capacitor;

the voltage controlling capacitor wiring is connected to a the compensation voltage-applying driver circuit for changing the potential of the compensation voltage signal after completion of writing to each of the sub-pixels to modulate the potential of the sub-pixel electrodes; and

the power supply circuit, in addition to generating power supply voltages for driving the gate driver circuit and the source driver circuit, is for generating a power supply voltage supplied to the compensation voltage-applying driver circuit.

18. The display device according to claim 17, wherein each of the sub-pixel electrodes has an area corresponding to a weighting of the digital image signals.

19. The display device according to claim 17, wherein the sub-pixel switching elements each have an ON current efficiency corresponding to a weighting of the digital image signals.

20. The display device according to claim 17, wherein each of the voltage controlling capacitors has a capacitance value corresponding to a weighting of the digital image signals.

21. The display device according to claim 17, further comprising a pixel electrode, wherein a storage capacitor is located between each upstream gate line of the gate lines and the corresponding pixel electrode.