×

Circuit and method for transforming data input/output format in parallel bit test

  • US 6,909,650 B2
  • Filed: 11/19/2003
  • Issued: 06/21/2005
  • Est. Priority Date: 11/20/2002
  • Status: Expired due to Fees
First Claim
Patent Images

1. A circuit for transforming a data input/output format of a semiconductor memory device, the circuit comprising:

  • a first transmission circuit which is activated when a first test mode signal is enabled, receives n data inputs from n data input ends, and transmits the n data inputs to m memory cells, wherein n and m are natural numbers and m is greater than n; and

    a second transmission circuit which is activated when a second test mode signal is enabled, receives n data inputs from the n data input ends, and transmits the n data inputs to the m memory cells, wherein data that is transmitted to adjacent memory cells of the m memory cells is inputted to different input ends of the n data input ends.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×