Desktop compositor using copy-on-write semantics

• US 6,911,984 B2
• Filed: 03/12/2003
• Issued: 06/28/2005
• Est. Priority Date: 03/12/2003
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Sabella, Paolo E., Wilt, Nicholas P.
• Primary Examiner(s): Chauhan, Ulka J.
• Application Number:
  US10/388,267
• Publication Number:
  US 20040179018A1
• Time in Patent Office: 839 Days
• Field of Search: 345/503, 345/519, 345/520, 345/531, 345/536, 345/539, 345/543, 345/545, 345/559, 345/562
• US Class Current: 345/536
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory

Abstract

Tile data for drawing and desktop buffers in a desktop compositor system is managed using “copy-on-write” semantics, in which tile data stored in a memory location is not transferred to another location until the tile data for one of the buffers is modified. For each tile in drawing buffers and desktop buffers, an association is maintained with a location in a tile memory, and the number of buffer tiles associated with each location is tracked. To copy a tile from one buffer to another, the tile association for the tile in the destination buffer is modified. New data for a tile of a buffer is written to the tile memory location associated with the buffer after ensuring that the tile memory location is not associated with any other tiles of any of the buffers. As a result, memory bandwidth can be considerably reduced.

Claims

1. A system for managing tile data for a plurality of tiles of a display, comprising:

a memory space configured to store tile data in a plurality of tile memory locations;

a plurality of buffers, each having a plurality of buffer tiles, wherein each buffer tile stores a reference associating the buffer tile with one of the tile memory locations and wherein corresponding buffer tiles in different ones of the plurality of buffers are associable with the same one or different ones of the tile memory locations; and

a memory interface circuit configured to receive a memory access command referencing a buffer tile of one of the plurality of buffers and to respond to the memory access command by accessing the tile memory location associated with the buffer tile,

wherein the memory interface circuit uses the references stored in the buffer tiles to modify associations of the buffer tiles with the tile memory locations.

2. The system of claim 1 wherein the memory interface circuit is further configured to respond to a command to read data from a source buffer tile of one of the plurality of buffers by accessing the tile memory location associated with the source buffer tile.

3. The system of claim 1 wherein the memory interface circuit is further configured to respond to a command to copy data from a source buffer tile of a first one of the plurality of buffers to a destination buffer tile of a second one of the plurality of buffers by associating the destination buffer tile with a same one of the tile memory locations as the source buffer tile.

4. The system of claim 1 wherein the memory interface circuit is further configured to respond to a command to write data to a target buffer tile of one of the plurality of buffers by ensuring that the tile memory location associated with the target buffer tile is not associated with any other buffer tile of any of the buffers and then writing the data to the tile memory location referenced by the target buffer tile.

5. The system of claim 1, further comprising:

a plurality of counters, each counter associated with a respective one of the tile memory locations and configured to store a value representing the number of buffer tiles that are associated with the respective one of the tile memory locations,

wherein the memory interface circuit uses the counters to detect a need for modifying associations of the buffer tiles with the tile memory locations.

6. The system of claim 1 further comprising:

a tile table comprising a plurality of entries, each tile table entry including a reference to a respective one of the plurality of tile memory locations,

wherein each buffer tile is associated with one of the tile memory locations by storing in the buffer a reference to the corresponding tile table entry.

7. The system of claim 6 wherein each tile table entry further includes a counter that is associated with the respective one of the plurality of tile memory locations, the counter being configured to store a value representing the number of buffer tiles that are associated with the respective one of the tile memory locations,

wherein the memory interface circuit uses the respective counters of the tile table entries to detect a need for modifying associations of the buffer tiles with the tile memory locations.

8. The system of claim 6 wherein the tile memory location reference stored in each tile table entry includes a pointer to a location in a memory device.

9. The system of claim 6 wherein the tile memory location reference stored in each tile table entry includes an offset value that maps to a location in a memory device.

10. The system of claim 6 wherein the tile memory location reference stored in each tile table entry has a static value.

11. The system of claim 6 wherein tile table memory location references stored in tile table entries are dynamically updated.

12. The system of claim 6 wherein the memory interface circuit is implemented on a chip and the tile table and buffers are implemented on the same chip.

13. The system of claim 1 wherein the tile memory space is located in one or more random access memory (RAM) arrays.

14. The system of claim 1 wherein the plurality of buffers includes:

a first drawing buffer and a second drawing buffer for tile data generated by an application; and

a first desktop buffer and a second desktop buffer for tile data to be displayed.

15. The system of claim 14, further comprising:

a desktop compositor module configured to generate desktop tile data for a first tile by issuing a read command to the memory interface, the read command referencing a first tile of the first drawing buffer, generating desktop tile data from the source tile data, and storing the desktop tile data via the memory interface by issuing a write command that references a first tile of the first desktop buffer.

16. The system of claim 15 wherein the desktop compositor module is further configured to generate desktop tile data for a second tile by selecting a second tile of the first drawing buffer as a data source and copying the selected tile to a second tile of the first desktop buffer via the memory interface.

17. The system of claim 15, further comprising:

scanout control logic configured to read display data via the memory interface by issuing a read command that references a tile of the second desktop buffer and to generate display control signals in response to the display data.

18. The system of claim 15 wherein source tile data is written via the memory interface in response to a write command issued by an application program, the write command referencing a tile of the second drawing buffer.

19. A method for managing data for a plurality of tiles of a display, the method comprising:

providing a plurality of buffers, each including a plurality of buffer tiles, each buffer tile being associated with one of a plurality of tile memory locations in a tile memory space, wherein the tile memory space is accessed by referencing one of the buffer tiles;

for each of the tile memory locations, maintaining a reference count of the buffer tiles associated with the tile memory location;

copying a source buffer tile of a first one of the buffers to a destination buffer tile of a second one of the buffers by associating the destination buffer tile with a same tile memory location as the source buffer tile and updating the reference counts; and

writing new data for the destination buffer tile to the tile memory location associated with the destination buffer tile after updating the destination buffer tile such that the tile memory location associated with the destination buffer tile is not associated with any other buffer tile.

20. The method of claim 19 wherein the act of copying a source buffer tile includes:

determining whether the destination buffer tile is associated with a first tile memory location associated with the source buffer tile or with a second tile memory location different from the first tile memory location; and

in response to determining that the destination buffer tile is associated with the second tile memory location;

modifying the association of the destination buffer tile such that the destination buffer tile is associated with the first tile memory location;

incrementing a first reference count for the first tile memory location; and

decrementing a second reference count for the second tile memory location.

21. The method of claim 19, wherein the act of writing new data for the destination buffer tile includes:

reading tile data from a tile memory location associated with the destination buffer tile;

updating the tile data with the new data;

determining from the reference counts whether a first tile memory location associated with the destination buffer tile is also associated with another buffer tile; and

in response to determining that the first tile memory location is also associated with another buffer tile;

identifying a second tile memory location that is not associated with any buffer tile;

modifying the association of the destination buffer tile such that the destination buffer tile is associated with the second tile memory location;

decrementing a first reference count for the first tile memory location; and

incrementing a second reference count for the second tile memory location.

22. The method of claim 21 wherein the act of identifying a second tile memory location includes:

identifying a tile memory location for which the reference count is zero.

23. The method of claim 21 wherein the act of identifying a second tile memory location includes:

identifying an unallocated tile memory location in the tile memory space; and

allocating The unallocated tile memory location as the second tile memory location.

24. The method of claim 19, further comprising:

providing a tile table having a plurality of entries, each tile table entry referencing a respective one of the tile memory locations; and

associating each buffer tile with one of the tile table entries, thereby associating each buffer tile with one of the tile memory locations.

25. The method of claim 24 wherein the act of maintaining a reference count of the number of buffer tiles associated with the tile memory location includes:

providing a counter in each of the tile table entries, the counter storing a counter value.

26. The method of claim 25 wherein the act of copying a source buffer tile includes:

determining whether the destination buffer tile is associated with a first tile table entry associated with the source buffer tile or with a second tile table entry other than the first tile table entry; and

in response to determining that the destination buffer tile is associated with the second tile table entry;

modifying the association of the destination buffer tile such that the destination buffer tile is associated with the first tile table entry;

incrementing the counter of the first tile table entry; and

decrementing the counter of the second tile table entry.

27. The method of claim 19, wherein the plurality of buffers includes:

a pair of drawing buffers for tile data generated by an application; and

a pair of desktop buffers for tile data to be displayed.

28. A method for managing data for a plurality of tiles of a display, the method comprising:

providing a plurality of buffers, each including a plurality of buffer tiles, each buffer tile being associated with one of a plurality of tile memory locations in a tile memory space, wherein the tile memory space is accessed by referencing one of the buffer tiles, the plurality of buffers including a first drawing buffer, a second drawing buffer, a first desktop buffer, and a second desktop buffer;

for each tile memory location, maintaining a reference count of the buffer tiles associated with the tile memory location;

scanning out a first display image by reading tile data from tile memory locations associated with buffer tiles of the first desktop buffer;

in parallel with the act of scanning out a first display image;

generating desktop tile data for a tile of a second display image from source tile data stored in a tile memory location associated with a buffer tile of the first drawing buffer; and

storing the desktop tile data in a tile memory location associated with a buffer tile of the second desktop buffer; and

in response to completion of the act of scanning out a first display image, copying the second desktop buffer to the first desktop buffer by associating each buffer tile of the second desktop buffer with a same tile memory location as a corresponding buffer tile of the first desktop buffer and updating the reference counts.

29. The method of claim 28 wherein the act of storing the desktop tile data includes:

writing the desktop tile data to a tile memory location associated with a tile of the second desktop buffer after updating the tile of the second desktop buffer such that the tile memory location associated with the tile of the second desktop buffer is not associated with any other buffer tile.

30. The method of claim 28 wherein the act of generating desktop tile data for a tile includes determining whether the source tile data is to be used without modification as the desktop tile data.

31. The method of claim 30, wherein the act of storing the desktop tile data includes:

in response to determining that the source tile data is to be used without modification, copying a tile of the first drawing buffer to the second desktop buffer by associating the tile of the second desktop buffer with a same tile memory location as a corresponding tile of the first drawing buffer and updating the reference counts; and

in response to determining that unmodified source tile data is not to be used as the desktop tile data;

modifying the source tile data; and

writing the modified tile data to a tile memory location associated with a tile of the second desktop buffer after updating the tile of the second desktop buffer such that the tile memory location associated with the tile of the second desktop buffer is not associated with any other buffer tile.

32. The method of claim 28, further comprising:

in parallel with the act of scanning out a first display image, writing source tile data for a third display image to a tile memory location associated with a buffer tile of the second drawing buffer after updating the buffer tile of the second drawing buffer such that the tile memory location associated with the buffer tile of the second drawing buffer is not associated with any other buffer tile.

33. The method of claim 32, further comprising:

in response to completion of the act of scanning out a first display image, copying the second drawing buffer to the first drawing buffer by associating each buffer tile of the second drawing buffer with a same tile memory location as a corresponding buffer tile of the first drawing buffer and updating the reference counts.