Transistor circuit

• US 6,914,448 B2
• Filed: 03/13/2003
• Issued: 07/05/2005
• Est. Priority Date: 03/15/2002
• Status: Expired due to Term

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Jinno, Yushi
• Primary Examiner(s): Nguyen, Vinh P.
• Application Number:
  US10/388,254
• Publication Number:
  US 20040004218A1
• Time in Patent Office: 845 Days
• Field of Search: 324763-770, 324/73.1, 324/158.1, 315/169.1, 349/40, 349/54, 349/192, 345/93, 345/275, 327/278, 327/416, 327/524, 327/537
• US Class Current: 324/750.3
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays

Abstract

Transistor capacitance Cdtr inevitably generated between the gate and the drain of a second TFT is increased. Accordingly, an operation test of a first TFT and the second TFT can be conducted by turning on the first TFT to charge the transistor capacitance Cdtr and detecting the stored charges.

Claims

1. A transistor circuit, comprising:

a first transistor including a first terminal connected to a signal line, the first transistor being operated by receiving a selection signal at its gate; and

a second transistor including a gate connected to a second terminal of the first transistor, the second transistor controlling an electric current related to a current-consuming or current-generating element;

wherein

transistor capacitance generated between the gate and a source or drain or channel area of the second transistor is no less than 5fF.

2. A transistor circuit as defined in claim 1, wherein

a storage capacitor for storing electric charges is connected to the second terminal of the first transistor and the gate of the second transistor.

3. A transistor circuit as defined in claim 2, wherein

the signal line connected to the first terminal of the first transistor is a data line which supplies display data;

the current-consuming or current-generating element is an organic EL element; and

the second transistor supplies, from a power line to the organic EL element, an electric current in accordance with a voltage stored in the storage capacitor.

4. A transistor circuit, comprising:

a first transistor including a first terminal connected to a signal line, the first transistor being operated by receiving a selection signal at its gate;

a second transistor including a gate connected to a second terminal of the first transistor, the second transistor controlling an electric current related to a current-consuming or current-generating element; and

a storage capacitor for storing electric charges connected to the second terminal of the first transistor and the gate of the second transistor;

wherein

transistor capacitance generated between the gate and a source or drain of the second transistor is no less than 5% of capacitance of the storage capacitor.

5. A transistor circuit as defined in claim 4, wherein

the signal line connected to the first terminal of the first transistor is a data line which supplies display data;

the current-consuming or current-generating element is an organic EL element; and

the second transistor supplies, from a power line to the organic EL element, an electric current in accordance with a voltage stored in the storage capacitor.

6. A transistor circuit, comprising:

a first transistor including a first terminal connected to a signal line, the first transistor being operated by receiving a selection signal at its gate; and

a second transistor including a gate connected to a second terminal of the first transistor, the second transistor controlling an electric current related to a current-consuming or current-generating element;

wherein

the second transistor is capable of increasing transistor capacitance generated between the gate and a source or drain or channel area of the second transistor by enlarging, in a planer direction, a portion of a channel region of the second transistor, thereby expanding the channel region while maintaining its channel width and channel length.

7. A transistor circuit, comprising:

a first transistor including a first terminal connected to a signal line, the first transistor being operated by receiving a selection signal at its gate;

a second transistor including a gate connected to a second terminal of the first transistor, the second transistor controlling an electric current related to a current-consuming or current-generating element;

wherein the second transistor is capable of increasing a transistor capacitance between the gate of the second transistor and a second terminal of the second transistor by enlarging, in a planer direction, a portion of a channel region of the second transistor, thereby expanding the channel region while maintaining a channel width of the channel region and a channel length; and

a storage capacitor for storing electric charges connected to the second terminal of the first transistor and the gate of the second transistor.

8. A transistor circuit, comprising:

a first transistor including a first terminal connected to a signal line, the first transistor being operated by receiving a selection signal at its gate;

a second transistor including a gate connected to a second terminal of the first transistor, the second transistor controlling an electric current related to a current-consuming or current-generating element;

wherein the signal line connected to the first terminal of the first transistor is a data line which supplies display data;

the current-consuming or current-generating element is an organic EL element; and

the second transistor supplies, from a power line to the organic EL element, an electric current in accordance with a voltage stored in the storage capacitor; and

wherein the second transistor is capable of increasing a transistor capacitance between the gate of the second transistor and a second terminal of the second transistor by enlarging, in planer direction, a portion of a channel region of the second transistor, thereby expanding the channel region while maintaining a channel width of the channel region and a channel length.

9. A method for testing a transistor circuit, wherein the transistor circuit includes

a first transistor including a first terminal connected to a signal line, the first transistor being operated by receiving a selection signal at its gate;

and

a second transistor including a gate connected to a second terminal of the first transistor, the second transistor controlling an electric current related to a current-consuming or current-generating element;

the testing method comprising;

setting voltage of the signal line to a predetermined voltage value;

in that state, turning on the first transistor such that the voltage of the signal line and gate voltage of the second transistor are set to the predetermined voltage value;

subsequently detecting a stored charge amount at the gate of the second transistor, so as to determine transistor capacitance of the second transistor; and

confirming operation of the second transistor based on the determined transistor capacitance.

10. A method as defined in claim 9, wherein the transistor capacitance is determined by performing detection in the signal line.

11. A method as defined in claim 10, wherein

a storage capacitor is connected to the gate of the second transistor, and

an amount of charges stored by the transistor capacitance is determined by subtracting an amount of charges stored in the storage capacitor from a sum amount of charges stored in both the storage capacitor and the transistor capacitance.

12. A method as defined in claim 9, wherein

the transistor capacitance is determined by performing detection in a power line connected to the second transistor.