Clamping circuit for an RF receiver system
First Claim
1. A low power consumption RF receiver system adapted for receiving and shaping transmitted digital data signals into a digital data stream for processing by a microprocessor, said receiver system comprising:
- an integrated circuit which includes a data slicer having an input, an output, and a reference input, said data slicer adapted to accept the received digital data signals at its input, shape the signals into a digital data stream, and pass the digital data stream through its output to the microprocessor, said integrated circuit further includes a peak detector having an input and an output, said peak detector adapted to sense ambient circuit noise at its input when received digital data signals are not present, develop a voltage reference signal representative of the peak value of the ambient circuit noise, and pass the voltage reference signal through its output to said reference input of said data slicer; and
a support circuit electrically interposed between said output of said peak detector and said reference input of said data slicer, said support circuit having a voltage divider and a charge capacitor that is adapted to accept said voltage reference signal and produce a clamping reference for said data slicer by first passing the output of said peak detector through said voltage divider and then across said charge capacitor such that said clamping reference thereby prevents said data slicer from responding to ambient circuit noise and passing false digital data streams to the microprocessor.
12 Assignments
0 Petitions
Accused Products
Abstract
A low power consumption RF receiver system that is adapted for receiving and shaping transmitted digital data signals into a digital data stream for processing by a microprocessor is provided. The receiver system comprises an integrated circuit, which includes a data slicer adapted to accept the received digital data signals, shape the signals into a digital data stream, and pass the digital data stream to the microprocessor. The integrated circuit further includes a peak detector adapted to sense ambient circuit noise when digital data signals are not present, develop a voltage reference signal representative of the peak value of the ambient circuit noise, and pass the voltage reference signal to the data slicer. The receiver system further includes a support circuit between the peak detector and the data slicer that has a voltage divider and a charge capacitor that is adapted to accept the voltage reference signal and produce a clamping reference for the data slicer thereby preventing the data slicer from responding to ambient circuit noise and passing false digital data streams to the microprocessor.
20 Citations
18 Claims
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1. A low power consumption RF receiver system adapted for receiving and shaping transmitted digital data signals into a digital data stream for processing by a microprocessor, said receiver system comprising:
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an integrated circuit which includes a data slicer having an input, an output, and a reference input, said data slicer adapted to accept the received digital data signals at its input, shape the signals into a digital data stream, and pass the digital data stream through its output to the microprocessor, said integrated circuit further includes a peak detector having an input and an output, said peak detector adapted to sense ambient circuit noise at its input when received digital data signals are not present, develop a voltage reference signal representative of the peak value of the ambient circuit noise, and pass the voltage reference signal through its output to said reference input of said data slicer; and
a support circuit electrically interposed between said output of said peak detector and said reference input of said data slicer, said support circuit having a voltage divider and a charge capacitor that is adapted to accept said voltage reference signal and produce a clamping reference for said data slicer by first passing the output of said peak detector through said voltage divider and then across said charge capacitor such that said clamping reference thereby prevents said data slicer from responding to ambient circuit noise and passing false digital data streams to the microprocessor. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A remote keyless entry system for a motor vehicle having a low power consumption RF receiver system adapted for receiving and shaping transmitted digital data signals into a digital data stream for processing by a microprocessor, said receiver comprising:
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an integrated circuit which includes a data slicer having an input, an output, and a reference input, said data slicer adapted to accept the received digital data signals at its input, shape the signals into a digital data stream, and pass the digital data stream through its output to the microprocessor, said integrated circuit further includes a peak detector having an input and an output, said peak detector adapted to sense ambient circuit noise at its input when received digital data signals are not present, develop a voltage reference signal representative of the peak value of the ambient circuit noise, and pass the voltage reference signal through its output to said reference input of said data slicer; and
a support circuit electrically interposed between said output of said peak detector and said reference input of said data slicer, said support circuit having a voltage divider and a charge capacitor that is adapted to accept said voltage reference signal and produce a clamping reference for said data slicer by first passing the output of said peak detector through said voltage divider and then across said charge capacitor such that said clamping reference thereby prevents said data slicer from responding to ambient circuit noise and passing false digital data streams to the microprocessor. - View Dependent Claims (8, 9, 10, 11, 12)
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13. An alarm system having a low power RF receiver system adapted for receiving and shaping transmitted digital data signals into a digital data stream for processing by a microprocessor, said receiver comprising:
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an integrated circuit which includes a data slicer having an input, an output, and a reference input, said data slicer adapted to accept the received digital data signals at its input, shape the signals into a digital data stream, and pass the digital data stream through its output to the microprocessor, said integrated circuit further includes a peak detector having an input and an output, said peak detector adapted to sense ambient circuit noise at its input when received digital data signals are not present, develop a voltage reference signal representative of the peak value of the ambient circuit noise, and pass the voltage reference signal through its output to said reference input of said data slicer; and
a support circuit electrically interposed between said output of said peak detector and said reference input of said data slicer, said support circuit having a voltage divider and a charge capacitor that is adapted to accept said voltage reference signal and produce a clamping reference for said data slicer by first passing the output of said peak detector through said voltage divider and then across said charge capacitor such that said clamping reference thereby prevents said data slicer from responding to ambient circuit noise and passing false digital data streams to the microprocessor. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification