Comprehensive integrated lithographic process control system based on product design and yield feedback system

• US 6,915,177 B2
• Filed: 09/30/2002
• Issued: 07/05/2005
• Est. Priority Date: 09/30/2002
• Status: Active Grant

• Current Assignee: Fullbrite Capital Partners, LLC
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Phan, Khoi A., Singh, Bhanwar, Rangarajan, Bharath, Subramanian, Ramkumar
• Primary Examiner(s): RODRIGUEZ, PAUL L
• Application Number:
  US10/261,569
• Publication Number:
  US 20040063009A1
• Time in Patent Office: 1,009 Days
• Field of Search: 700/28, 700/32, 700/51, 700/96, 700/121, 700108-110, 438/5, 438/14, 702/182
• US Class Current: 700/109
• CPC Class Codes: G03F 7/70525 Controlling normal operating mode, e.g. matching different apparatus, remote control or prediction of failure
• CPC Class Codes: G03F 7/70616 Monitoring the printed patterns
• CPC Class Codes: G03F 7/70858 Environment aspects, e.g. pressure of beam-path gas, temperature pollution aspects G03F7/70916
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Abstract

The present invention provides systems and methods that facilitate performing fabrication process. Critical parameters are valued collectively as a quality matrix, which weights respective parameters according to their importance to one or more design goals. The critical parameters are weighted by coefficients according to information such as, product design, simulation, test results, yield data, electrical data and the like. The invention then can develop a quality index which is a composite “score” of the current fabrication process. A control system can then do comparisons of the quality index with design specifications in order to determine if the current fabrication process is acceptable. If the process is unacceptable, test parameters can be modified for ongoing processes and the process can be re-worked and re-performed for completed processes. As such, respective layers of a device can be customized for different specifications and quality index depending on product designs and yields.

Claims

1. A process control system comprising:

a controller that controllably performs a fabrication process;

a process tool that obtains measurement information and is controlled by the controller; and

a monitor component that collectively analyzes the measurement information, appropriately weights the information, determines whether the fabrication process is acceptable, and generates a quality matrix based on critical parameters determined from the measurement information;

the critical parameters comprise at least two of;

critical dimensions, defects, and layout dimensions.

2. The system of claim 1, the quality matrix comprising a plurality of critical parameters and weighted coefficients, the critical parameters being directly and/or indirectly related to the measurement information.

3. The system of claim 1, the measurement information being obtained in situ.

4. The system of claim 1, the measurement information being obtained from a post process inspection.

5. The system of claim 1, the monitor component being further operative to determining the fabrication process unacceptable and to modify test parameters employed by the controller.

6. The system of claim 1, the monitor component being further operative to determine that the fabrication process is unacceptable, to modify test parameters, and to cause the controller to re-perform the fabrication process.

7. The system of claim 1, the fabrication process being a patterning process.

8. The system of claim 1, the fabrication process being an etching process.

9. The system of claim 1, the fabrication process being a metallization process.

10. A fabrication monitoring system comprising:

at least one database that maintains device related information for a fabrication process for a semiconductor device;

a quality matrix generator that obtains critical parameters and develops a quality matrix based at least in part on the critical parameters and generates a quality index, the quality index being representative of a relationship of the critical parameters and expected parameters;

the critical parameters comprise at least two of;

critical dimensions, detected defects, and layout dimensions.

11. The system of claim 10, the quality index being a percentage type value.

12. The system of claim 10, the quality matrix comprising at least one row, respective rows of the at least one row being correlate with a process goal.

13. The system of claim 12, one row of the at least one row being correlated with product yield.

14. The system of claim 12, the at least one database comprising a device process database, a product yield database, and a device image database.

15. The system of claim 12, the quality matrix comprising, for respective rows of the quality matrix, the critical parameters and weighted coefficients associated with the critical parameters.

16. The system of claim 15, the weighted coefficients respectively indicating relevance of the associated critical parameters.

17. The system of claim 15, further comprising a re-work component operative to rework the semiconductor device on the quality index indicating that results of the fabrication process are unacceptable.

18. A method of performing a fabrication process on a semiconductor device comprising:

obtaining critical parameters based on measurements of the semiconductor device;

generating a quality matrix, wherein respective points of the quality matrix comprise one of the critical parameters and a weighted coefficient; and

generating a quality index as a function of the quality matrix, the quality index indicating a collective acceptability of the fabrication process;

the critical parameters comprise at least two of;

critical dimensions, defect information, and layout dimensions.

19. The method of claim 18, further comprising determining test parameters for the fabrication process prior to obtaining the critical parameters.

20. The method of claim 18, further comprising defining an acceptable range of index values to which the quality index can be compared to determine whether the fabrication process is acceptable.

21. The method of claim 18, further comprising modifying test parameters for the fabrication process based at least partly on the quality matrix and the quality index.

22. The method of claim 18, further comprising reversing effects of the fabrication process on the semiconductor device on the quality index indicating that the fabrication process is unacceptable.

23. The method of claim 18, further comprising obtaining the measurements during a post process inspection.

24. The method of claim 18, wherein the fabrication process is a patterning process.

25. The method of claim 24, further comprising performing an etch process on the semiconductor device on the quality index indicating that the fabrication process has performed acceptably.

26. A system that facilitates a fabrication process comprising:

means for obtaining critical parameters of the fabrication process for a semiconductor device;

means for generating a quality matrix wherein respective points of the quality matrix comprise one of the critical parameters and a weighted coefficient;

means for determining the weighted coefficients; and

means for generating a quality index as a function of the quality matrix, the quality index indicating a collective acceptability of the fabrication process;

the critical parameters comprise at least two of;

critical dimensions, defect information, and overlay dimensions.

27. The system of claim 26 employing a Bayesian belief network in connection with at least one of:

generating the quality matrix, determining the weighted coefficients, and generating the quality index.