Methods for providing a magnetic shield for an integrated circuit having magnetoresistive memory cells

• US 6,916,668 B2
• Filed: 12/06/2002
• Issued: 07/12/2005
• Est. Priority Date: 09/25/2000
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Spielberger, Richard K., Katti, Romney R.
• Primary Examiner(s): Ho, Hoai
• Assistant Examiner(s): Huynh, Andy
• Application Number:
  US10/314,377
• Publication Number:
  US 20030098469A1
• Time in Patent Office: 949 Days
• Field of Search: 438/3, 438/57, 438/106, 438/127, 438/238, 438/381, 438/778, 257/659
• US Class Current: 438/3
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G01R 33/025 Compensating stray fields G01R33/0017 takes precedence
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15153 the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield of relatively high permeability is affixed directly to a surface of semiconductor die containing an integrated circuit structure with magnetoresistive memory cells.

Claims

1. A method of providing a magnetic shield for an integrated circuit, the method comprising:

providing a die with magnetoresistive memory cells for the integrated circuit;

providing a magnetic shield that is configured to fit within a die cavity of a package for the integrated circuit;

bonding the magnetic shield to the die such that a surface of the magnetic shield is substantially parallel to a magnetization plane of the magnetoresistive memory cells of the die; and

forming an insulating layer within the magnetic shield such that the insulating layer is disposed between the die and an electrically conductive layer of the magnetic shield.

2. The method as defined in claim 1, wherein bonding further comprises bonding with cyanate ester.

3. The method as defined in claim 1, wherein bonding further comprises bonding with cyanate ester that is loaded with silver such that the loaded cyanate ester is conductive.

4. The method as defined in claim 1, wherein the magnetic shield comprises μ

metal.

5. The method as defined in claim 1, wherein the magnetic shield comprises Mu metal further comprising forming the Mu metal magnetic shield to a thickness of about 0.004 inches.

6. The method as defined in claim 1, further comprising forming the magnetic shield and bonding the magnetic shield to the die such that the magnetic shield extends beyond the magnetic materials of the magnetoresistive memory cells.

7. The method as defined in claim 1, further comprising grounding the magnetic shield.

8. The method as defined in claim 1, further comprising grounding the magnetic shield to a ground pad via a thin wire.

9. The method as defined in claim 1, wherein bonding the magnetic shield further comprises bonding the magnetic shield to a surface of the die that is proximate to the magnetic materials of magnetoresistive memory cells, further comprising bonding an additional magnetic shield to an opposite surface of the die.

10. A method of protecting an integrated circuit magnetoresistive memory, the method comprising:

providing a die for the integrated circuit magnetoresistive memory; and

forming a magnetic shield on at least one surface of the die, such that the magnetic shield is substantially parallel to a magnetization plane of the magnetoresistive memory cells of the die, wherein forming the magnetic shield further comprises;

dispersing a shield metal powder in an organic carrier and binder to create a shield paste;

dispensing the shield paste over a portion of the die; and

curing the shield paste.

11. A method of processing a wafer comprising:

providing the wafer, where the wafer includes die for integrated circuit magnetoresistive memory;

forming a passivation layer on the wafer; and

forming a magnetic shield on at least one surface of the wafer, such that the magnetic shield is substantially parallel to a magnetization plane of the magnetoresistive memory cells of the die, wherein forming the magnetic field further comprises;

preparing a slurry of an organic carrier and a powder of shield metal;

patterning the slurry on the wafer such that electrical connections are accessible on the die; and

curing the slurry.

12. The method as defined in claim 11, further comprising forming a second magnetic shield on an opposite surface of the wafer.

13. The method as defined in claim 11, wherein patterning further comprises silk screening.

14. The method as defined in claim 11, wherein the powder of shield metal comprises at least one metal element selected from the group consisting of iron, cobalt, and nickel.

15. The method as defined in claim 11, wherein the powder of shield metal comprises at least one alloy with a metal selected from the group consisting of iron, cobalt, and nickel.

16. The method as defined in claim 11, wherein the powder of shield metal comprises at least one metal oxide selected from the group consisting of iron oxide, cobalt oxide, and nickel oxide.

17. A method of processing a wafer comprising:

providing the wafer, where the wafer includes die for integrated circuit magnetoresistive memory;

forming a passivation layer on the wafer; and

forming a magnetic shield on at least one surface of the wafer, such that the magnetic shield is substantially parallel to a magnetization plane of the magnetoresistive memory cells of the die, wherein forming the magnetic shield further comprises;

blanket depositing a layer of magnetic field shield material on the wafer, wherein blanket depositing further comprises;

forming a seed layer of the magnetic field shield material on the wafer; and

plating magnetic field shield material on the seed layer;

coating the layer of magnetic field shield material with photoresist;

patterning the photoresist; and

etching to selectively remove portions of the layer of magnetic field shield material.

18. A method of assembling an integrated circuit, the method comprising:

providing a die for an integrated circuit;

providing a shield adapted to fit within a die cavity of a package for the integrated circuit; and

using a bonding material to bond the shield to the die, where the bonding material is compatible with high assembly temperatures consistent with assembly of high-reliability hermetic packages.

19. The method as defined in claim 18, further comprising using bonding material that is free from any organic material.

20. The method as defined in claim 18, further comprising using bonding material that is stable up to 350 degrees centigrade.

21. The method as defined in claim 18, further comprising using bonding material that comprises cyanate ester.

22. The method as defined in claim 18, wherein the package comprises a ceramic package, further comprising:

providing a first portion of the ceramic package, wherein the first portion is configured to hold the die;

placing the die in the first portion of the ceramic package;

providing a second portion of the ceramic portion; and

assembling the first portion and the second portion with the high assembly temperature to form a hermetically-sealed ceramic package.

23. The method as defined in claim 18, wherein the die provided further comprises magnetic memory cells, and further comprising using Mu metal for the shield.

24. A method of assembling an integrated circuit, the method comprising;

providing a die with magnetoresistive memory cells for an integrated circuit;

providing a shield adapted to fit within a die cavity of a package for the integrated circuit; and

using a bonding material bond the shield to the die, where the bonding material is complete with high assembly temperatures consistent with assembly of high-reliability hermetic packages.

25. The method as defined in claim 24, further comprising using bonding material that is free from any organic material.

26. The method as defined in claim 24, further comprising using bonding material that is stable up to 350 degrees centigrade.

27. The method as defined in claim 24, further comprising using bonding material that comprises cyanate ester.

28. The method as defined in claim 24, wherein the package comprises a ceramic package, further comprising:

providing the first portion of the ceramic package, wherein the first portion is configured to hold the die;

placing the die in the first portion of the ceramic package;

providing a second portion; and

assembling the first portion and the second portion with the high assembly temperature to form a hermetically-sealed package.

29. The method as defined in claim 24, wherein the shield comprises a magnetic shield.

30. The method as defined in claim 24, further comprising using Mu metal for the shield.

31. A method of assembling an integrated circuit, the method comprising:

providing a die for an integrated circuit;

providing a magnetic shield adapted to fit within a die cavity of a package for the integrated circuit; and

using a bonding material to bond the magnetic shield to the die, where the bonding material is compatible with high assembly temperatures consistent with assembly of high-reliability hermetic packages.

32. The method as defined in claim 31, further comprising using bonding material that is free from any organic material.

33. The method as defined in claim 31, further comprising using bonding material that is stable up to 350 degrees centigrade.

34. The method as defined in claim 31, further comprising using bonding material that comprises cyanate ester.

35. The method as defined in claim 31, wherein the package comprises a ceramic package, further comprising:

providing a first portion of the ceramic package, wherein the first portion is configured to hold the die;

placing the die in the first portion of the ceramic package;

providing a second portion of the ceramic portion; and

assembling the first portion and the second portion with the high assembly temperature to form a hermetically-sealed ceramic package.

36. The method as defined in claim 31, wherein the die provided further comprises magnetic memory cells.

37. The method as defined in claim 31, further comprising using Mu metal for the magnetic shield.