Memory space organization

• US 6,918,022 B2
• Filed: 02/28/2001
• Issued: 07/12/2005
• Est. Priority Date: 02/28/2001
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Li, Fulton Q., Brucks, Douglas J., Bhatt, Dhiraj U.
• Primary Examiner(s): Elmore, Reba I.
• Application Number:
  US09/795,546
• Publication Number:
  US 20020120822A1
• Time in Patent Office: 1,595 Days
• Field of Search: 711/114, 711/170, 711/171, 711/203
• US Class Current: 711/171
• CPC Class Codes: G06F 12/0684 with feedback, e.g. presence or absence of unit detected by addressing, overflow detection
• CPC Class Codes: G06F 9/5016 the resource being the memory

Abstract

A method provided comprises querying a plurality of devices for storage space. The method also comprises allocating, as at least a single storage unit, a portion of the plurality of the devices for storage across the plurality of devices. The method further comprises enabling storing of the data into the portion of the plurality of devices.

Claims

1. A system, comprising:

a first device;

a second device;

an interface to receive information from the first device and the second device; and

a controller coupled to the interface, the controller to;

determine that an amount of data to be stored on the first device exceeds an amount of available storage on the first device;

query the second device to determine if the second device has available storage; and

store a portion of the data on the second device, wherein the portion is accessible to the first device.

2. The system of claim 1, wherein the first device and the second device are interconnected to the controller through a connecting media.

3. The system of claim 2, wherein the connecting media is a network connection.

4. The system of claim 1, wherein the controller to store the portion of the data on the second device includes the controller to allocate memory space across the first device and the second device.

5. The system of claim 4, wherein the controller further includes the controller to employ a symbolic address mapping for addressing the memory space.

6. The system of claim 1, wherein the controller is integrated into at least one of the first device and the second device.

7. The system of claim 1, wherein the controller to store the portion of the data on the second device includes the controller to share addressable memory space mapped across the first device and the second device.

8. The system of claim 1, wherein the controller to store the portion of the data on the second device includes the controller to provide windowing for an application executed on at least one of the first device and the second device.

9. The system of claim 1, wherein the controller to store the portion of the data on the second device includes the controller to manage data movement between the first device and the second device.

10. The system of claim 9, wherein the controller to store the portion of the data on the second device further includes the controller to employ an address snooping agent for the managing data movement between the first device and the second device.

11. The system of claim 1, wherein the controller to store the portion of the data on the second device includes the controller to provide data integrity support for data mirrored by at least one of the first device and the second device.

12. The system of claim 1, wherein the controller is a memory service component, the memory service component comprising:

an application interface for communicating with an application executed on at least one of the first device and the second device;

a device interface coupled to the application interface, the device interface to provide a communication path for the application interface to a device that is local to the memory service component;

a remote interface coupled to the application interface, the remote interface to provide a communication path for the application interface to a device that is remote to the memory service component;

an address manager coupled to the application interface, the address manager to provide an address to the application interface for locating the storage space; and

an address snooping agent controller coupled to the application interface, the address snooping agent controller to allow the application interface to direct at least one memory access request by an application executed by at least one of the first device and the second device.

13. The system of claim 12, wherein the address manager comprises:

a symbolic map table;

a symbolic addressable space manager, the symbolic addressable space manager to access the symbolic map table to generate a symbolic address to address the storage space.

14. A method comprising:

determining that an amount of data to be stored on a first device exceeds an amount of available storage on the first device;

querying a second device to determine if the second device has available storage; and

storing a portion of the data on the second device, wherein the portion is accessible to the first device.

15. The method of claim 14, wherein querying the second device includes enabling an amount of memory that can be addressed across the plurality of the devices to be determined.

16. The method of claim 14, wherein storing the portion of the data on the second device includes enabling, as at least a single storage unit, a first memory space of a first device and a second memory space of a second device to be allocated for storage.

17. The method of claim 16, wherein storing the portion of the data on the second device includes enabling an address to be generated for the single unit of memory space.

18. The method of claim 17, wherein enabling the address to be generated for the single unit of memory space includes enabling a virtual address to be generated, wherein the virtual address can be used by at least one of the first device and the second device for memory access.

19. The method of claim 18, wherein enabling the virtual address to be generated includes enabling a symbolic identifier of the memory space to be generated and offsetting the symbolic identifier by a displacement value.

20. The method of claim 19, wherein enabling the symbolic identifier of the memory space to be generated comprises enabling a symbolic map table to be generated wherein the symbolic map table includes entries which correlate to the memory space.

21. The method of claim 16, wherein storing the portion of the data on the second device includes enabling at least one of the first device and the second device to access the single unit of memory space across the first device and the second device.

22. The method of claim 21, wherein storing the portion of the data on the second device further includes enabling an application to be executed on at least one of the first device and the second device to access the single unit of memory space across the first device and the second device.

23. The method of claim 22, wherein storing the portion of the data on the second device further includes enabling the application executed on at least one of the first device and the second device to write data into the single unit of memory space across the first device and the second device.

24. The method of claim 22, wherein storing the portion of the data on the second device further includes enabling the application executed on at least one of the first device and the second device to read data from the single unit of memory space across the first device and the second device.

25. An article comprising a medium storing instructions that, if executed, enable a processor-based system to:

determine that an amount of data to be stored on a first device exceeds an amount of available storage on the first device;

query a second device to determine if the second device has available storage; and

store a portion of the data on the second device, wherein the portion is accessible to the first device.

26. The article of claim 25 further storing instructions that, if executed, enable a processor-based system to determine at least a single unit of one memory space across the first device and the second device.

27. The article of claim 26 further storing instructions that, if executed, enable a processor-based system to determine an address for accessing the single unit of memory space across the first device and the second device.

28. The article of claim 26 further storing instructions that, if executed, enable a processor-based system to generate a virtual address to access the single unit of memory space across the first device and the second device.

29. The article of claim 26 further storing instructions that, if executed, enable a processor-based system to allow an application to be executed on at least one of the first device and the second device to access the single unit of memory space across the first device and the second device.