Thin film transistor and pixel structure thereof
First Claim
1. A thin film transistor, comprising:
- a gate electrode, formed on a substrate, wherein the gate electrode has at least one notch;
a gate dielectric layer, formed over the substrate, covering the gate electrode;
a source region, formed on the gate dielectric layer, wherein the source region is located over a region outside the notch of the gate electrode and the source region overlaps a portion of the gate electrode;
a drain region, formed over the gate dielectric layer exposed by the source region, wherein the drain region is over the notch of the gate electrode and the drain region overlaps a portion of the gate electrode at the edge of the notch; and
a channel layer formed on the gate dielectric layer and located over the gate electrode and between the source region and drain region.
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Abstract
A thin film transistor and a pixel structure with the same are disclosed. The thin film transistor includes a gate electrode with at least one notch, a gate dielectric layer, a source region, a drain region, and a channel layer. The gate electrode is on a substrate. The gate dielectric layer is on the substrate and covers the gate electrode. The source region is on the gate dielectric layer, wherein it is over a region outside the notch of the gate electrode and overlaps a portion of the gate electrode. The drain region is on the gate dielectric layer, wherein it is over the notch of the gate electrode and overlaps the gate electrode at the edge of the notch. Further, the channel layer is on the gate dielectric layer and between the source and drain regions. Due to asymmetric design of the source and drain regions, the parasitic capacitance change can be substantially reduced when a misalignment of the upper and lower metal layers occurs.
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Citations
13 Claims
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1. A thin film transistor, comprising:
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a gate electrode, formed on a substrate, wherein the gate electrode has at least one notch;
a gate dielectric layer, formed over the substrate, covering the gate electrode;
a source region, formed on the gate dielectric layer, wherein the source region is located over a region outside the notch of the gate electrode and the source region overlaps a portion of the gate electrode;
a drain region, formed over the gate dielectric layer exposed by the source region, wherein the drain region is over the notch of the gate electrode and the drain region overlaps a portion of the gate electrode at the edge of the notch; and
a channel layer formed on the gate dielectric layer and located over the gate electrode and between the source region and drain region. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A pixel structure, comprising:
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a scan line, formed on a substrate;
a gate electrode, formed on the substrate and electrically connected to the scan line, wherein the gate electrode has at least one notch;
a gate dielectric layer, formed over the substrate, covering the scan line and the gate electrode;
a channel layer, formed over the gate dielectric layer and located over the gate electrode;
a source region, formed on the channel layer, wherein the source region is over a region outside the notch of the gate electrode and the source region overlaps a portion of the gate electrode;
a drain region, formed over the channel layer exposed by the source region, wherein the drain region is over the notch of the gate electrode and the drain region overlaps a portion of the gate electrode at the edge of the notch;
a data line, formed on the gate dielectric layer, wherein the data line is electrically connected to the source region;
a protection layer, formed over the substrate, covering the gate electrode, the gate dielectric layer, the channel layer, the source region, the drain region, the scan line and the data line;
a contact, formed within the protection layer and electrically connected to the drain region; and
a pixel electrode, formed on the protection layer, the pixel electrode electrically connected to the drain region through the contact. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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Specification