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Differential to single-ended logic converter

  • US 6,924,668 B2
  • Filed: 09/25/2003
  • Issued: 08/02/2005
  • Est. Priority Date: 09/25/2003
  • Status: Expired due to Fees
First Claim
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1. A converter stage for converting a differential logic input signal and a corresponding common mode differential logic signal each having a first single-ended logic signal and a complementary second single-ended logic signal to a single-ended logic output signal comprising:

  • (a) a first differential stage having a first PMOS transistor and a second PMOS transistor wherein the gate terminal of the first PMOS transistor is coupled to the first single-ended signal of the common mode level differential signal, wherein the gate terminal of the second PMOS transistor is coupled to the second single-ended signal of the common mode level differential signal, and wherein the source terminals of the PMOS transistors are connected to a first current source;

    (b) a second differential stage having a first NMOS transistor and a second NMOS transistor wherein the gate terminal of the first NMOS transistor is coupled to the first single-ended signal of the differential input signal, wherein the gate terminal of the second NMOS transistor is coupled to the second single-ended signal of the differential input signal, and wherein the source terminals of the NMOS transistors are connected to a second current source, and wherein the drain terminals of the NMOS transistors are connected to the drain terminals of the PMOS transistors;

    (c) an output connected to the source terminal of the second PMOS transistor and to the drain terminal of the second NMOS transistor for providing the single-ended output signal; and

    (d) wherein the current sources are controlled by a voltage level that is centered between the mid-potentials of the common mode level differential logic signal and the mid-potential of the differential logic input signal such that both current sources deliver the same constant current.

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