Input/output buffer for protecting a circuit from signals received from external devices and method of use
First Claim
1. An input/output buffer for use with a high voltage power supply that is variably provided and a low voltage power supply and receiving an external voltage signal, the input/output buffer comprising:
- a reference power generation circuit connected to the high voltage power supply and the low voltage power supply for converting the external voltage signal to a reference power, the reference power generation circuit having a protection circuit including a plurality of MOS transistors for decreasing the external voltage signal to a predetermined voltage when the input/output buffer receives the external voltage signal and is not supplied with the voltage of the high voltage power supply, each of the MOS transistors having a back gate connected to a predetermined node, each predetermined node having a voltage less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.
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Accused Products
Abstract
An input/output buffer that protects a circuit from voltage signals provided from an external device. The input/output buffer includes a reference power generation circuit connected to a high voltage power supply and a low voltage power supply to convert the voltage of an external voltage signal and generate reference power. The reference power generation circuit has a protection circuit including a plurality of MOS transistors for decreasing the voltage of the external voltage signal to a predetermined voltage when the input/output buffer is not supplied with the voltage of the high voltage power supply. Each of the MOS transistors has a back gate connected to a predetermined node at which the voltage is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.
27 Citations
19 Claims
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1. An input/output buffer for use with a high voltage power supply that is variably provided and a low voltage power supply and receiving an external voltage signal, the input/output buffer comprising:
a reference power generation circuit connected to the high voltage power supply and the low voltage power supply for converting the external voltage signal to a reference power, the reference power generation circuit having a protection circuit including a plurality of MOS transistors for decreasing the external voltage signal to a predetermined voltage when the input/output buffer receives the external voltage signal and is not supplied with the voltage of the high voltage power supply, each of the MOS transistors having a back gate connected to a predetermined node, each predetermined node having a voltage less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method for protecting an input/output buffer from a voltage signal that is provided from an external device, wherein the input/output buffer is connected to a high voltage power supply that is variably provided and a low voltage power supply and includes an input/output circuit for transferring data with the external device, the method comprising the steps of:
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decreasing the voltage of the voltage signal to a predetermined voltage with a plurality of MOS transistors, which are connected in series between the high voltage power supply and the low voltage power supply, each MOS transistor having a back gate to generate reference power when the input/output buffer is not supplied with the voltage of the high voltage power supply;
supplying the input/output circuit with the reference power; and
supplying the back gate of each MOS transistor with voltage that is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply. - View Dependent Claims (16)
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17. An input buffer for use with a high voltage power supply that is variably provided and a low voltage power supply and for receiving an external voltage signal, the input buffer comprising:
a reference power generation circuit connected to the high voltage power supply and the low voltage power supply for converting the external voltage signal to a reference power, the reference power generation circuit having a protection circuit including a plurality of MOS transistors for decreasing the external voltage signal to a predetermined voltage when the external voltage signal is received and the voltage of the high voltage power supply is not supplied, each of the MOS transistors having a back gate connected to a predetermined node, each predetermined node having a voltage less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply. - View Dependent Claims (18)
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19. An output buffer for use with a high voltage power supply that is variably provided and a low voltage power supply and receiving an external voltage signal, the output buffer comprising:
a reference power generation circuit connected to the high voltage power supply and the low voltage power supply for converting the external voltage signal to a reference power, the reference power generation circuit having a protection circuit including a plurality of MOS transistors for decreasing the external voltage signal to a predetermined voltage when the output buffer receives the external voltage signal and is not supplied with the voltage of the high voltage power supply, each of the MOS transistors having a back gate connected to a predetermined node, each predetermined node having a voltage less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.
Specification