Broadcast system in disk array controller

• US 6,925,532 B2
• Filed: 10/01/2003
• Issued: 08/02/2005
• Est. Priority Date: 03/17/1999
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd. (Hitachi, Ltd.), Hitachi Video And Information System Inc.
• Original Assignee: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd. (Hitachi, Ltd.), Hitachi Video And Information System Inc.
• Inventors: Mikami, Hikari, Tanaka, Atsushi, Fujibayashi, Akira, Minowa, Nobuyuki, Nanao, Hisashi
• Primary Examiner(s): Padmanabhan, Mano
• Assistant Examiner(s): Namazi, Mehdi
• Application Number:
  US10/674,535
• Publication Number:
  US 20040064637A1
• Time in Patent Office: 671 Days
• Field of Search: 709/213, 710/8, 711/114, 711/147, 711/148
• US Class Current: 711/114
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0658 Controller construction arrangements
• CPC Class Codes: G06F 3/0683 Plurality of storage devices

Abstract

A disk array controller connected in a star configuration with a plurality of interfaces each having a processor, a shared memory connected to the interfaces by access paths and a common bus connected to the interfaces. The shared memory transmits interruption signals to the interface by way of control signals when one of the processors writes broadcast data into the shared memory.

Claims

1. A storage system comprising:

a plurality of disk devices; and

a disk controller,

wherein said disk controller comprises;

a plurality of interfaces including host computer interfaces which are connectable to host computers and disk device interfaces which are connectable to said plurality of disk devices,

wherein each of said interfaces includes a plurality of processors,

a broadcast register connected to said interfaces in a one-to-one ratio by respective access paths,

a cache memory unit, and

a selector,

wherein said host computer interfaces and said disk device interfaces are connected via said selector to said cache memory unit,

wherein said host computer interfaces and said disk device interfaces are directly connected to said broadcast register,

wherein one of said processors of each of said interfaces transmits broadcast data to another one of said processors via said broadcast register.

2. A storage system according to claim 1, wherein said broadcast register transmits interruption signals to said interfaces when one of said processors writes broadcast data into said broadcast register by way of respective access paths,

wherein upon receiving an interruption signal, one of said processors of each of said interfaces reads the broadcast data written in said broadcast register.

3. A storage system according to claim 2, wherein each of said interfaces has a memory, and

wherein said one of said processors of each of said interfaces stores said broadcast data into said memory within said interface after reading said broadcast data from said broadcast register.

4. A storage system according to claim 3, wherein the number of access paths between said selector and said interfaces is larger than the number of access paths between said cache memory and said selector.

5. A storage system comprising:

a plurality of disk devices; and

a disk controller,

wherein said disk controller comprises;

a plurality of interfaces including host computer interfaces which are connectable to host computers and disk device interfaces which are connectable to said plurality of disk devices,

wherein each of said interfaces respectively have a plurality of processors,

a shared memory unit connected to said interfaces in a one-to-one ratio by respective access paths,

a cache memory unit, and

a switch,

wherein said host computer interfaces and said disk device interfaces are connected via said switch to said cache memory unit,

wherein said host interfaces and said disk device interfaces are directly connected via said switch to said shared memory unit,

wherein one of said processors of each of said interfaces transmits broadcast data to another one of said processors via said shared memory unit.

6. A storage system comprising:

a plurality of disk devices; and

a disk controller,

wherein said disk controller comprises;

a plurality of host interfaces connectable to said disk devices,

wherein each of said disk drive interfaces has a second processor,

a shared memory unit connected to said host interfaces and said disk device interfaces in a one-to-one ratio by respective access paths,

a cache memory unit,

a first selector connected to said host interfaces and said cache memory, and

a second selector connected to said disk device interfaces and said cache memory,

wherein said host interfaces and said disk device interfaces are directly connected via said first and second selectors to said shared memory unit,

wherein one of said first and second processors transmits broadcast data to another one of said first and second processors via said shared memory unit.

7. A storage system according to claim 6, wherein said shared memory unit transmits interruption signals to said host interfaces and said disk device interfaces when one of said first and second processors writes broadcast data into said shared memory unit by way of respective access paths,

wherein upon receiving an interruption signal, one of said first and second processors reads the broadcast data written in said shared memory unit.

8. A storage system according to claim 7, wherein each of said host interfaces and disk device interfaces has a memory, and

wherein said one of said first and second processors stores said broadcast data into said memory within said interface after reading said broadcast data from said shared memory unit.

9. A storage system according to claim 8, wherein the number of access paths between said first switch and said host interfaces is larger than the number of access paths between said cache memory and said first switch, and the number of access paths between said second switch and said disk device interfaces is larger than the number of access paths between said cache memory and said second switch.

10. A storage system comprising:

a plurality of disk devices; and

a disk controller,

wherein said disk controller comprises;

a plurality of host interfaces connectable to computers,

wherein each of said host interfaces has a first processor,

a plurality of disk device interfaces connectable to said disk devices,

wherein each of said disk drive interfaces has a second processor,

a switch connected to said host interfaces and said disk device interfaces in a one-to-one ratio by respective access paths,

a cache memory unit,

a first selector connected to said host interfaces and said cache memory, and

a second selector connected to said disk device interfaces and said cache memory,

wherein said host interfaces and said disk device interfaces are directly connected via said first and second selectors to said switch,

wherein one of said first and second processors transmits broadcast data to another one of said first and second processors via said switch.

11. A storage system according to claim 10, further comprising a broadcast register connected to said switch, wherein said broadcast data are stored in said broadcast register.