Tool for generating a re-generative functional test

• US 6,928,638 B2
• Filed: 08/07/2001
• Issued: 08/09/2005
• Est. Priority Date: 08/07/2001
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Lindsay, William C., Jayaraman, Kamalnayan, Maneparambil, Kailasnath, Zhou, Geliang, Parvathala, Praveen K.
• Primary Examiner(s): DAS, CHAMELI
• Application Number:
  US09/922,639
• Publication Number:
  US 20030033558A1
• Time in Patent Office: 1,463 Days
• Field of Search: 717/124, 717/126, 716/1, 716/4, 714/733, 714/25, 714/30, 714/761, 714/819, 714/719, 714/28, 714/43, 714/33, 714/734, 712/227
• US Class Current: 717/124
• CPC Class Codes: G06F 11/263 Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers

Abstract

A host system for generating a software built-in self-test engine (SBE) is provided for enabling on-chip generation and application of a re-generative functional test on a complex device such as a microprocessor under test. The host system comprises user directives provided to indicate user desired actions; instruction information provided to define a suite of instructions; and a SBE generation tool arranged to generate a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device such as a microprocessor under test and activation of a re-generative functional test on the complex device under test (DUT).

Claims

1. A system, comprising:

user directives provided to indicate user desired actions;

instruction information provided to define a suite of instructions; and

a software built-in self-test engine (SBE) generation tool arranged to generate a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device under test (DUT) and activation of a re-generative functional test on the complex device under test (DUT);

wherein said SBE generation tool comprises;

a random instruction test generator (RIT-G) composer to receive the user directives and the instruction information and generate a compact RIT-G code;

a test execution directive composer to receive the user directives and the device constraints and create a run time environment to enable the re-generative functional test to repeatedly generate functional tests and execute generated tests on-board the complex device under test (DUT);

a test result compaction module composer to generate a test result compaction module code; and

a code merger to merge code from the RIT-G composer, the test execution directive composer and the test result compaction module composer to generate the software built-in self-test engine (SBE).

2. The system as claimed in claim 1, wherein said SHE generation tool is a software tool installed to generate the software built-in self-test engine (SBE), and wherein individual components of said SBE generation tool, including the random instruction test generator (RIT-G) composer, the test execution directive composer, the test result compaction module composer, and the code merger, are software modules written in any computer language.

3. The system as claimed in claim 2, wherein said SBE generation tool is provided on a computer readable medium.

4. The system as claimed in claimed in claim 1, wherein said SHE generation tool is a hardware implementation installed to generate the software built-in self-test engine (SBE).

5. The system as claimed in claim 1, wherein said run time environment includes a test execution environment including an exception handler to handle illegal conditions such as undesirable memory accesses, deadlock, shut-down, and infinite loops, and a random instruction test (RIT) environment to provide equivalent operating system (OS) functions needed by an RIT-G to generate the re-generative functional test.

6. The system as claimed in claim 1, wherein said compact RIT-G code produced is a C-language program compiled by a C-compiler to produce an assembly language version of the RJT-G code, and when the run time environment, the test result compaction module code and the assembly language version of the RJT-G code are assembled by an assembler, a single program indicating the SBE in the target DUT'"'"'s object code is obtained.

7. The system as claimed in claim 6, wherein said compact RIT-G code includes an instruction generation module to generate individual instructions during testing application.

8. A system, comprising:

user directives provided to indicate user desired actions;

instruction information provided to define a suite of instructions; and

a software built-in self-test engine (SBE) generation tool arranged to generate a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device under test (DUT) and activation of a re-generative functional test on the complex device under test (DUT);

wherein said SBE is to be merged with an expected test result and then loaded on-board the complex device under test (DUT) so as to activate the re-generative functional test on the complex device under test (DUT) and make a comparison between test results of the re-generative functional test and the expected test result to check for design validations and/or manufacturing defects.

9. The system as claimed in claim 8, wherein said expected test result is obtained from computer modeling of the complex device under test (DUT) or from a known good device.

10. A system, comprising:

user directives provided to indicate user desired actions;

instruction information provided to define a suite of instructions; and

a software built-in self-test engine (SBE) generation tool arranged to generate a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device under test (DUT) and activation of a re-generative functional test on the complex device under test (DUT);

wherein said software built-in self-test engine (SBE) comprises;

a random instruction test generator (RIT-G) including random instruction test (RIT) machine code residing on-board the complex device under test (DUT) for generating the re-generated functional test;

a test program execution module including test execution directives for providing a run time environment to store and run the re-generated functional test; and

a test result compaction module including compression machine code to compress test results of the re-generated functional test for storage on-board the complex device under test (DUT).

11. The system as claimed in claim 10, wherein a test execution environment employs an exception handler to handle illegal conditions, including undesirable memory accesses, deadlock, shut-down, and infinite loops.

12. A system, comprising:

user directives provided to indicate user desired actions;

instruction information provided to define a suite of instructions; and

a software built-in self-test engine (SBE) generation tool arranged to generate a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device under test (DUT) and activation of a re-generative functional test on the complex device under test (DUT);

wherein said complex device under test (DUT) includes a microprocessor;

wherein, when test patterns of the SBE are applied to the microprocessor from an on-board memory, the microprocessor performs the following;

beginning a set-up for executing test patterns;

executing the test patterns to generate a series of test sequences and associated data for respective test sequences;

running the test sequences, and at the end of the test sequences, obtaining test results for storage in the on-board memory; and

dumping the test results of the test patterns for making a comparison with an expected test result to check for design validations and/or manufacturing defects; and

wherein said software built-in self-test engine (SBE) is programmed to generate and execute one or more (“

N”

),instruction sequences, each sequence being executed on one or more (“

M”

) data sets, where “

N” and

“

M”

represent an integer no less than “

1” and

are user-specified numbers used in generating the SBE by the SBE generation tool.

13. The system as claimed in claim 12, wherein said software built-in self-test engine (SBE) is further programmed to generate one or more signatures to provide a unique identification of the test result of each test sequence and indicate whether the test result of a particular test sequence is “

good”

or “

bad”

.

14. A computer readable medium having stored thereon a software built-in self-test engine (SBE) generation software tool which, when executed by a host system, causes the system to perform:

demanding inputs of user directives indicating user desired actions;

obtaining instruction information provided to define a suite of instructions; and

generating a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device under test (DUT) and activation of a re-generative functional test on the complex device under test (DUT);

wherein said SBE generation tool comprises;

a random instruction test generator (RIT-G) composer to receive the user directives and the instruction information and generate a compact RIT-G code;

a test execution directive composer to receive the user directives and the device constraints and create a run time environment needed to enable the re-generative functional test to repeatedly generate functional tests and execute generated tests on-board the complex device under test (DUT);

a test result compaction module composer to generate a test result compaction module code; and

a code merger to merge code from the RIT-G composer, the test execution directive composer and the test result compaction module composer to generate the software built-in self-test engine (SBE).

15. The computer readable medium as claimed in claim 14, wherein said SBE is to be merged with an expected test result and then loaded on-board the complex device under test (DUT) so as to activate the re-generative functional test on the complex device under test (DUT) and make a comparison between test results of the re-generative functional test and the expected test result to check for design validations and/or manufacturing defects.

16. The computer readable medium as claimed in claim 15, wherein said expected test result is obtained from computer modeling of the complex device under test (DUT) or from a known good device.

17. The computer readable medium as claimed in claim 14, wherein said run time environment includes a test execution environment including an exception handler to handle illegal conditions such as undesirable memory accesses deadlock, shut-down, and infinite loops, and a random instruction test (RIT) enviroment to provide equivalent operating system (OS) functions needed by an RIT-G to generate the re-generative functional test.

18. The computer readable medium as claimed in claim 14, wherein said compact RIT-G code produced is a C-language program compiled by a C-compiler to produce an assembly language version of the RIT-G code, and when the run time environment, the test result compaction module code and the assembly language version df the RIT-G code are assembled by an assembler, a single program indicating the SBE in the target DUT'"'"'s object code is obtained.

19. The computer readable medium as claimed in claim 14, wherein said compact RIT-G code includes an instruction generation module to generate individual instructions during testing application.

20. A computer readable medium having stored thereon a software built-in self-test engine (SBE) generation software tool which, when executed by a host system, causes the system to perform:

demanding inputs of user directives indicating user desired actions;

obtaining instruction information provided to define a suite of instructions; and

generating a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device under test (DUT) and activation of a re-generative functional test on the complex device under test (DUT);

wherein said software built-in self-test engine (SBE) comprises;

a random instruction test generator (RIT-G) including compact random instruction test (RIT) machine code residing on-board the complex device under test (DUT) for generating the re-generated functional test;

a test program execution module including test execution directives for providing a run time environment to store and run the re-generated functional test; and

a test result compaction module including compression machine code to compress test results of the re-generated functional test for storage on-board the complex device under test (DUT).

21. A computer readable medium having stored thereon a software built-in self-test engine (SBE) generation software tool which, when executed by a host system, causes the system to perform:

demanding inputs of user directives indicating user desired actions;

obtaining instruction information provided to define a suite of instructions; and

generating a software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of a complex device under test (DUT) and activation of a re-generative functional test on the complex device under test (DUT);

wherein said software built-in self-test engine (SBE) is programmed to generate and execute one or more (“

N”

) instruction sequences during testing, each sequence being executed on one or more (“

M”

) data sets, where “

N” and

“

M”

represent an integer no less than “

1” and

are user-specified numbers used in generating the SBE by the SBE generation tool.

22. The computer readable medium as claimed in claim 21, wherein said software built-in self-test engine (SBE) is further programmed to generate one or more signatures to provide a unique identification of the test result of each test sequence and indicate whether the test result of a particular test sequence is “

good”

or “

bad”

.

23. A method for generating a software built-in self-test engine (SBE) for on-chip generation and application of a re-generative functional test on a complex device under test (DUT), comprising:

obtaining user directives which indicate user desired actions;

obtaining instruction information which defines a suite of instructions; and

generating the software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of the complex device under test (DUT) and activation of the re-generative functional test on the complex device under test (DUT);

wherein said software built-in self-test engine (SBE) is generated by;

generating a compact random instruction test generator (RIT-G) code based on the user directives and the instruction information;

creating a run time environment to enable the re-generative functional test to repeatedly generate functional tests and execute generated tests on-board the complex device under test (DUT) based on the device constraints;

generating a test result compaction module code based on the user directives and the device constraints; and

merging the RIT-G code, the run time environment and the test result compaction module code to obtain the software built-in self-test engine (SBE).

24. The method as claimed in claim 23, wherein said run time environment includes a test execution environment including an exception handler to handle illegal conditions such as undesirable memory accesses, deadlock, shut-down, and infinite loops, and a random instruction test (RIT) environment to provide equivalent operating system (OS) functions needed by a random instruction test generator to generate (RIT-G) the re-generative functional test.

25. The method as claimed in claim 23, wherein said compact RIT-G code produced is a C-language program compiled by a C-compiler to produce an assembly language version of the RIT-G code, and when the run time environment, the test result compaction module code and the assembly language version of the RIT-G code are assembled by an assembler, a single program indicating the SBE in the target DUT'"'"'s object code is obtained.

26. The method as claimed in claim 23, wherein said complex device under test (DUT) includes a microprocessor.

27. The method as claimed in claim 23, wherein, when test patterns of the SBE are applied to a microprocessor from an on-board memory, the microprocessor performs the following:

beginning a set-up for executing test patterns;

executing the test patterns to generate a series of test sequences and associated data for respective test sequences;

running the test sequences, and at the end of the test sequences, obtaining test results for storage in the on-board memory; and

dumping the test results of the test patterns for making a comparison with an expected test result to check for design validations and/or manufacturing defects.

28. The method as claimed in claim 27, wherein said software built-in self-test engine (SBE) is programmed to generate and e or more (“

N”

) instruction sequences, each sequence being executed on one or more (“

M”

) data sets during testing, where “

N”

“

M”

represent an integer no less than “

1” and

are user-specified numbers used in generating the SBE.

29. The method as claimed in claim 28, wherein said software built-in self-test engine (SBE) is further programmed to generate one or more signatures to provide a unique identification of the test result of each test sequence and indicate whether the test result of a particular test sequence is “

good”

or “

bad”

.

30. A method for generating a software built-in self-test engine (SBE) for on-chip generation and application of a re-generative functional test on a complex device under test (DUT), comprising:

obtaining user directives which indicate user desired actions;

obtaining instruction information which defines a suite of instructions; and

generating the software built-in self-test engine (SBE) based on the user directives, the instruction information and device constraints, for subsequent storage on-board of the complex device under test (DUT) and activation of the re-generative functional test on the complex device under test (DUT);

wherein said SBE is to be merged with an expected test result and then loaded on-board the complex device under test (DUT) so as to activate the re-generative functional test on the complex device under test (DUT) and make a comparison between test results of the re-generative functional test and the expected test result to check for design validations and/or manufacturing defects.

31. The method as claimed in claim 30, wherein said expected test result is obtained from computer modeling of the complex device under test (DUT) or from a known good device.