Semiconductor device and method for manufacturing the same
First Claim
1. A semiconductor device in which a plurality of semiconductor chips is stacked in layers and sealed in a package, wherein:
- an upper-layer semiconductor chip is stacked via a plurality of spacers on a lower-layer semiconductor chip, such that said plural spacers directly contact both of said upper-layer and said lower-layer semiconductor chips, said plural spacers being made of a photo-hardening resin;
at least one of said plurality of spacers is formed on said lower-layer semiconductor chip; and
said upper-layer semiconductor chip, said plurality of spacers, and said lower-layer semiconductor chip are sealed in said package.
3 Assignments
0 Petitions
Accused Products
Abstract
There is provided a semiconductor device in which a plurality of semiconductor chips is stacked in layers and sealed in a package, including: a lower-layer semiconductor chip which is mounted on a package board; an upper-layer semiconductor chip which is stacked via a plurality of spacers on the lower-layer semiconductor chip; at least one first conductor interconnecting electrically at least one first electrode on the lower-layer semiconductor chip and at least one first internal terminal on the package board; at least one second conductor electrically interconnecting at least one second electrode on the upper-layer semiconductor chip and at least one second internal terminal on the package board; and the package for sealing therein the lower-layer semiconductor chip, the upper-layer semiconductor chip, and the at least one first conductor and the at least one second conductor which are all on the package board.
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Citations
33 Claims
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1. A semiconductor device in which a plurality of semiconductor chips is stacked in layers and sealed in a package, wherein:
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an upper-layer semiconductor chip is stacked via a plurality of spacers on a lower-layer semiconductor chip, such that said plural spacers directly contact both of said upper-layer and said lower-layer semiconductor chips, said plural spacers being made of a photo-hardening resin;
at least one of said plurality of spacers is formed on said lower-layer semiconductor chip; and
said upper-layer semiconductor chip, said plurality of spacers, and said lower-layer semiconductor chip are sealed in said package. - View Dependent Claims (2, 3, 4, 5, 6, 7, 29)
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8. A semiconductor device in which a plurality of semiconductor chips is stacked in layers and sealed in a package, comprising:
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a lower-layer semiconductor chip having a first surface and an opposing second surface, and mounted on a package board;
an upper-layer semiconductor chip which is stacked via a plurality of spacers on said first surface of said lower-layer semiconductor chip, such that said plural spacers are directly contacting both said lower-layer and said upper-layer semiconductor chips, said plural spacers being made of a photo-hardening resin;
at least one first conductor interconnecting electrically at least one first electrode on said first surface of said lower-layer semiconductor chip and at least one first internal terminal on said package board;
at least one second conductor electrically interconnecting at least one second electrode on said upper-layer semiconductor chip and at least one second internal terminal on said package board; and
said package sealing therein said lower-layer semiconductor chip, said upper-layer semiconductor chip, and said at least one first conductor and said at least one second conductor which are all on said package board. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A semiconductor device manufacturing method for stacking a plurality of semiconductor chips in layers and sealing said plurality of semiconductor chips in a package, comprising the steps of:
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forming a plurality of spacers directly on a lower-layer semiconductor chip;
stacking an upper-layer semiconductor chip via said plurality of spacers on said lower-layer semiconductor chip, such that said plural spacers directly contact said upper-layer semiconductor chip, said plural spacers being made of photo-hardening resin; and
sealing said lower-layer semiconductor chip, said plurality of spacers, and said upper-layer semiconductor chip in an insulating material making up said package.
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20. A semiconductor device manufacturing method for stacking a plurality of semiconductor chips in layers and sealing said plurality of semiconductor chips in a package, comprising:
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a lower-layer semiconductor chip mounting step of mounting a lower-layer semiconductor chip on a package board;
a first connecting step of interconnecting electrically at least one first internal terminal on said package board and at least one first electrode on said lower-layer semiconductor chip using at least one first conductor;
a spacer formation step of forming a plurality of spacers on said lower-layer semiconductor chip;
an upper-layer semiconductor chip stacking step of stacking an upper-layer semiconductor chip via said plurality of spacers on said lower-layer semiconductor chip;
a second connecting step of interconnecting electrically at least one second internal terminal on said package board and at least one second electrode on said upper-layer semiconductor chip using at least one second conductor; and
a sealing step of sealing said lower-layer semiconductor chip, said upper-layer semiconductor chip, and said at least one first conductor and said at least one second conductor in an insulating material making up said package, wherein said spacer formation step is performed by supplying liquid resin and then photo-hardening said liquid resin. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28)
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30. A semiconductor device in which a plurality of semiconductor chips is stacked in layers and sealed in a package, wherein:
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an insulating sheet is adhered on a surface of an upper-layer semiconductor chip;
said upper-layer semiconductor chip is stacked via a plurality of spacers and said insulating sheet on a lower-layer semiconductor chip, such that said plural spacers directly contact both said insulating sheet and said lower-layer semiconductor chips, said plural spacers being made of a photo-hardening resin;
at least one of said plurality of spacers is formed on said lower-layer semiconductor chip; and
said upper-layer semiconductor chip, said insulating sheet, said plurality of spacers, and said lower-layer semiconductor chip are sealed in said package. - View Dependent Claims (33)
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31. A semiconductor device in which a plurality of semiconductor chips is stacked in layers and sealed in a package, comprising:
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a lower-layer semiconductor chip having a first surface and an opposing second surface, and being mounted on a package board;
an insulating sheet adhered on a surface of an upper-layer semiconductor chip;
said upper-layer semiconductor chip is stacked via a plurality of spacers and said insulating sheet on said first surface of said lower-layer semiconductor chip, such that said plural spacers are directly contacting both said insulating sheet and said lower-layer semiconductor chip, said plural spacers being made of a photo-hardening resin;
at least one first conductor interconnecting electrically at least one first electrode on said first surface of said lower-layer semiconductor chip and at least one first internal terminal on said package board;
at least one second conductor electrically interconnecting at least one second electrode on said upper-layer semiconductor chip and at least one second internal terminal on said package board; and
said package sealing therein said lower-layer semiconductor chip, said upper-layer semiconductor chip, said insulating sheet, and said at least one first conductor and said at least one second conductor which are all on said package board. - View Dependent Claims (32)
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Specification