Soft mute circuit

• US 6,931,124 B1
• Filed: 01/13/2000
• Issued: 08/16/2005
• Est. Priority Date: 01/13/2000
• Status: Expired due to Term

• Current Assignee: Cirrus Logic Incorporated
• Original Assignee: Acoustic Technologies Incorporated (Cirrus Logic Incorporated)
• Inventors: Rubacha, Raymond, Thomasson, Samuel L.
• Primary Examiner(s): Tran, Sinh
• Assistant Examiner(s): SINGH, RAMNANDAN P
• Application Number:
  US09/482,229
• Time in Patent Office: 2,042 Days
• Field of Search: 379/393, 379/421, 330/254, 330/278, 330/279, 381104-108, 381/94.5, 846/27, 846/33, 846/63, 846/65, 847/02, 847/11
• US Class Current: 379/421
• CPC Class Codes: H03G 3/345 Muting during a short period of time when noise pulses are detected, i.e. blanking H03G3/348 takes precedence
• CPC Class Codes: H03G 3/348 Muting in response to a mechanical action or to power supply variations, e.g. during tuning; Click removal circuits
• CPC Class Codes: H04M 1/6016 in the receiver circuit

Abstract

A soft mute circuit includes a programmable amplifier controlled by a register. Data is stored in the register from an adder that combines the current data in the register with a second number for increasing or decreasing the gain of the amplifier. A summation circuit includes a plurality of inputs coupled by gates to a summation node and the summation node is coupled to an input of the programmable amplifier. The gates are controlled by suitable logic for selecting input signals in any combination. A control loop maintains the gain of the amplifier at a predetermined level.

Claims

1. A circuit for unobtrusively masking transient signals in an electronic device by changing gain, said circuit comprising:

an amplifier having a first input for receiving control data and a second input for receiving a signal;

a register having an output coupled to said first input; and

an adder having an output coupled to said register for storing data in said register and having a pair of inputs, the output of said register also being coupled to one of said pair of inputs, the second of said pair of inputs being coupled to a source of slope data, said adder having a control input for adding or subtracting the slope data from the output of the register;

wherein said adder adjusts the gain of said amplifier in accordance with the slope data to change gain gradually.

2. The circuit as set forth in claim 1 and further including a control loop coupled to said adder for holding the gain of said amplifier at a predetermined value.

3. The circuit as set forth in claim 1 and further including a summation circuit coupled to said second input, wherein said summation circuit includes several inputs.

4. The circuit as set forth in claim 3 wherein said summation circuit further includes logic for selecting one, all, or combinations of signals from the several inputs for summation.

5. In a telephone, a soft mute circuit characterized by:

an amplifier having a first input for receiving control data and a second input for receiving a signal;

a register having an output coupled to said first input; and

an adder having an output coupled to said register for storing data in said register and having a pair of inputs, the output of said register also being coupled to one of said pair of inputs, the second of said pair of inputs being coupled to a source of slope data, said adder having a control input for adding or subtracting the slope data from the output of the register;

wherein said adder adjusts the gain of said amplifier in accordance with the slope data to mute or unmute gradually.

6. The telephone as set forth in claim 5 wherein said telephone includes a summation node and said summation node is coupled to said second input.

7. The telephone as set forth in claim 6 wherein telephone includes a plurality of band pass filters, each of said band pass filters having an output coupled to said summation node.