Pipelined analog to digital converter

• US 6,933,876 B1
• Filed: 03/22/2002
• Issued: 08/23/2005
• Est. Priority Date: 09/30/1999
• Status: Expired due to Term

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Yin, Guang-Ming, Ryan, Patrick D., Colles, Joseph H., Shamlou, Daryush, Underbrink, Paul A., Hale, Kelly H.
• Primary Examiner(s): WILLIAMS, HOWARD L
• Application Number:
  US10/104,381
• Time in Patent Office: 1,250 Days
• Field of Search: 341/161, 341/162, 341/163
• US Class Current: 341/162
• CPC Class Codes: H03M 1/004 Reconfigurable analogue/digital or digital/analogue converters H03M1/02 takes precedence
• CPC Class Codes: H03M 1/007 among different resolutions
• CPC Class Codes: H03M 1/44 Sequential comparisons in series-connected stages with change in value of analogue signal
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes
• CPC Class Codes: H04W 88/06 adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals

Abstract

A cell phone is provided that may be used with multiple radio formats, such as GSM and CDMA. The cell phone includes a receiver that receives radio signals and converts them into electrical signals. An analog to digital converter is connected to the receiver and converts an analog input to a digital output having an adjustable number of bits at an adjustable sampling frequency. A cell phone application specific integrated circuit is connected to the analog to digital converter, which is used to process the digital output to extract encoded telecommunications data in one of the supported radio formats.

Claims

1. An analog to digital converter comprising:

converter circuitry;

a first input coupled to the converter circuitry;

a second input coupled to the converter circuitry;

an output coupled to the converter circuitry; and

wherein an input signal applied to the first input is sampled at a first frequency and a first sample size, and wherein the input signal applied to the second input is sampled at a second frequency and a second sample size.

2. The analog to digital converter of claim 1 wherein the converter circuitry further comprises a plurality of cells, each cell coupled in series to at least one other cell, the first input coupled to a first cell, and the second input coupled to a second cell.

3. The analog to digital converter of claim 1 wherein the converter circuitry further comprises:

a first cell having a first current rating;

a second cell coupled in series to the first cell, the second cell having a second current rating, where the second current rating is less than the first current rating; and

one or more additional cells, each additional cell coupled in series to a preceding cell, each additional having a current rating that is less than the current rating of the preceding cell.

4. The analog to digital converter of claim 2 wherein each cell further comprises:

a comparator coupled to a cell input;

an amplifier coupled to the cell input;

a subtractor coupled to the output of the comparator; and

an adder coupled to the output of the subtractor and the amplifier.

5. The analog to digital converter of claim 4 wherein the comparator for each cell compares the voltage received at the cell input to a predetermined value.

6. The analog to digital converter of claim 4 wherein the comparator for each cell compares the voltage received at the cell input to a predetermined value, and the predetermined value for each successive cell is less than the predetermined value for the preceeding cell.

7. The analog to digital converter of claim 4 wherein the comparator for each cell compares the voltage received at the cell input to a predetermined value, and the output of the comparator is a digital value of one if the voltage received at the cell input is greater than the predetermined value.

8. The analog to digital converter of claim 4 wherein the adder for each cell outputs the voltage received at the cell input if the voltage is less than a predetermined value, and outputs the difference between the voltage received at the cell input and the predetermined value if the voltage received at the cell input is equal to or greater than the predetermined value.

9. A method for converting a signal from analog to digital comprising:

receiving a signal at a first input of an analog to digital converter;

converting the signal to a digital format having a first number of bits;

receiving the signal at a second input of the analog to digital converter; and

converting the signal to a second digital format having a second number of bits,

where the first number of bits is not equal to the second number of bits.

10. The method of claim 9 wherein receiving the signal at the first input of the analog to digital converter comprises receiving the signal at a first input of a pipelined analog to digital converter.

11. The method of claim 9 wherein converting the signal to the digital format having the first number of bits comprises converting the signal to the digital format having the first number of bits using a number of stages of the digital to analog converter equal to the number of bits.

12. The method of claim 9 wherein receiving the signal at the second input of the analog to digital converter comprises receiving the signal at a second input of a pipelined analog to digital converter.

13. The method of claim 9 wherein receiving the signal at the second input of the analog to digital converter comprises receiving the signal between a first stage and a second stage of an analog to digital converter.

14. The method of claim 9 wherein receiving the signal at the second input of the analog to digital converter further comprises turning off one or more stages of the analog to digital converter between the first input and the second input.

15. A pipelined analog to digital converter comprising:

a first stage having a first input;

a second stage having a second input; and

a plurality of outputs wherein the number of outputs for a signal applied to the first stage is different from the number of outputs for the signal applied to the second input.

16. The pipelined analog to digital converter of claim 15 further comprising one or more stages coupled between the first stage and the second stage.

17. The pipelined analog to digital converter of claim 15 further comprising one or more stages coupled between the second stage and a least significant bit output.

18. The pipelined analog to digital converter of claim 15 wherein each stage further comprises:

a comparator coupled to a stage input;

an amplifier coupled to the stage input;

a subtractor coupled to the output of the comparator; and

an adder coupled to the output of the subtractor and the amplifier.

19. The pipelined analog to digital converter of claim 15 wherein each stage further comprises an output that is representative of either a digital one or a digital zero.

20. The pipelined analog to digital converter of claim 15 wherein each stage further comprises an output that is derived from the applied signal.