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MOS type image pickup device having pixel interleaved array layout and one analog to digital conversion unit provided per each pair of adjacent photoelectric conversion columns

  • US 6,933,972 B2
  • Filed: 02/09/2001
  • Issued: 08/23/2005
  • Est. Priority Date: 02/10/2000
  • Status: Expired due to Fees
First Claim
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1. A solid-state image pickup device, comprising:

  • a number of photoelectric conversion elements disposed in a plurality of rows and columns in a surface of a semiconductor substrate, each photoelectric conversion element of a photoelectric conversion element column of an even number being shifted in a column direction by about a half pitch between photoelectric conversion elements in each photoelectric conversion element column, relative to each photoelectric conversion element of a photoelectric conversion element column of an odd number, and each photoelectric conversion element of a photoelectric conversion element row of an even number being shifted in a row direction by about a half pitch between photoelectric conversion elements in each photoelectric conversion element row, relative to each photoelectric conversion element of a photoelectric conversion element row of an odd number, so that each photoelectric conversion element row includes photoelectric conversion elements of only the odd or even columns;

    a switching circuit unit provided per each photoelectric conversion element, said switching circuit unit including an output transistor capable of generating an electric images signal representing an amount of a signal charge accumulated in a corresponding photoelectric conversion element;

    a row select signal wiring line provided per each photoelectric conversion element row and extending along a corresponding photoelectric conversion element row, said row select signal wiring line connected to and supplying a row select signal to associated switching circuit units of odd or even columns, the row select signal controlling generation of the electric image signal;

    an analog/digital conversion unit provided for each pair of adjacent photoelectric conversion element columns, and comprising a common sample/hold circuit and a common A/D converter; and

    an output signal line electrically connecting said analog/digital conversion unit and the output transistors in said each pair of adjacent photoelectric conversion element columns.

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