MOS type image pickup device having pixel interleaved array layout and one analog to digital conversion unit provided per each pair of adjacent photoelectric conversion columns

• US 6,933,972 B2
• Filed: 02/09/2001
• Issued: 08/23/2005
• Est. Priority Date: 02/10/2000
• Status: Expired due to Fees

• Current Assignee: Fujifilm Corporation (Fujifilm Holdings Corporation)
• Original Assignee: Fuji Photo Film Co Limited (Fujifilm Holdings Corporation)
• Inventors: Suzuki, Nobuo, Masukane, Kazuyuki
• Primary Examiner(s): Garber, Wendy R.
• Assistant Examiner(s): Vieaux, Gary C.
• Application Number:
  US09/779,528
• Publication Number:
  US 20010013900A1
• Time in Patent Office: 1,656 Days
• Field of Search: 348/302, 348/303, 348/304, 348/315, 348/311, 250/208, 257/240
• US Class Current: 348/302
• CPC Class Codes: H04N 25/136 using complementary colours
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Abstract

A number of photoelectric conversion elements are disposed in a plurality of rows and columns in a pixel shift layout, and an analog/digital conversion unit is provided per two photoelectric conversion element columns to form a MOS type solid-state image pickup device. It is possible to suppress an increase in the manufacture cost of MOS type solid state image pickup devices with built-in A/D conversion units and improve the integration degree of photoelectric conversion elements.

Claims

1. A solid-state image pickup device, comprising:

a number of photoelectric conversion elements disposed in a plurality of rows and columns in a surface of a semiconductor substrate, each photoelectric conversion element of a photoelectric conversion element column of an even number being shifted in a column direction by about a half pitch between photoelectric conversion elements in each photoelectric conversion element column, relative to each photoelectric conversion element of a photoelectric conversion element column of an odd number, and each photoelectric conversion element of a photoelectric conversion element row of an even number being shifted in a row direction by about a half pitch between photoelectric conversion elements in each photoelectric conversion element row, relative to each photoelectric conversion element of a photoelectric conversion element row of an odd number, so that each photoelectric conversion element row includes photoelectric conversion elements of only the odd or even columns;

a switching circuit unit provided per each photoelectric conversion element, said switching circuit unit including an output transistor capable of generating an electric images signal representing an amount of a signal charge accumulated in a corresponding photoelectric conversion element;

a row select signal wiring line provided per each photoelectric conversion element row and extending along a corresponding photoelectric conversion element row, said row select signal wiring line connected to and supplying a row select signal to associated switching circuit units of odd or even columns, the row select signal controlling generation of the electric image signal;

an analog/digital conversion unit provided for each pair of adjacent photoelectric conversion element columns, and comprising a common sample/hold circuit and a common A/D converter; and

an output signal line electrically connecting said analog/digital conversion unit and the output transistors in said each pair of adjacent photoelectric conversion element columns.

2. A solid-state image pickup device according to claim 1, wherein said output signal line comprises two subsidiary output signal lines for each photoelectric conversion element column, extending along the associated photoelectric conversion element column.

3. A solid-state image pickup device according to claim 1, wherein said output signal line comprises a common output signal line disposed between said pair of adjacent photoelectric conversion element columns.

4. A solid-state image pickup device according to claim 1, further comprising a first scan unit for sequentially supplying the row select signal to said row select signal wiring lines one at a time to select an odd-column row and an even-column row alternately.

5. A solid-state image pickup device according to claim 4, further comprising a first control unit for controlling an operation of said first scan unit.

6. A solid-state image pickup device according to claim 1, further comprising at least one power supply voltage wiring line electrically connected to each of said output transistors for supplying a power supply voltage to the output transistors, wherein:

each of said output transistors receives at its control terminal an electric signal representing the amount of the signal charge accumulated in a corresponding photoelectric conversion element; and

each of said switching circuit units further comprises a row select transistor connected to said output transistor by serial connection, said row select transistor receiving at its control terminal the row select signal, the serial connection being interposed between a corresponding output signal line and said power supply voltage wiring line with electrically connecting to the output signal line and power supply voltage wiring line.

7. A solid-state image pickup device according to claim 6, wherein:

each of said switching circuit units further comprises a reset transistor electrically connected to a corresponding photoelectric conversion element and said power supply voltage wiring line, said reset transistor being interposed between a control terminal of said corresponding output transistor and said power supply voltage wiring line; and

the solid-state image pickup device further comprises a reset signal supply wiring line provided for each photoelectric conversion element row and extending along a corresponding photoelectric conversion element row, said reset signal supply wiring line being electrically connected to control terminals of corresponding reset transistors.

8. A solid-state image pickup device according to claim 7, further comprising a second scan unit for supplying a control signal for said reset transistor to each of said reset signal supply wiring lines at a predetermined timing.

9. A solid-state image pickup device according to claim 8, further comprising a second control unit for controlling an operation of said second scan unit.

10. A solid-state image pickup device according to claim 1, wherein:

each of said switching circuit units further comprises a transfer transistor electrically connected to a corresponding photoelectric conversion element and a corresponding output transistor, said transfer transistor being interposed between said corresponding photoelectric conversion element and said corresponding output transistor; and

the solid-state image pickup device further comprises a transfer control signal supply wiring line provided for each photoelectric conversion element row and extending along a corresponding photoelectric conversion element row, said transfer control signal supply wiring line being electrically connected to control terminals of corresponding transfer transistors.

11. A solid-state image pickup device according to claim 10, further comprising a third scan unit for supplying a control signal for said transfer transistor to each of said transfer control signal wiring lines at a predetermined timing.

12. A solid-state image pickup device according to claim 11, further comprising a third control unit for controlling an operation of said third scan unit.

13. A solid-state image pickup device according to claim 1, wherein each of said analog/digital conversion units includes a sample/hold circuit unit having a capacitor and an analog/digital converter for converting an output of said sample/hold circuit unit into a digital signal.

14. A solid-state image pickup device according to claim 13, wherein each of said analog/digital converter includes:

a comparator for comparing a voltage of output signal output from said sample/hold circuit unit with a reference voltage signal, said comparator outputting a control operation signal when the reference voltage signal externally supplied to said comparator becomes equal to the voltage of output signal output from said sample/hold circuit; and

a latch circuit for receiving the control operation signal and a count signal, latching the count of the count signal externally supplied to said latch circuit when the control operation signal is supplied, and outputting an electric signal representing the count latched.

15. A solid-state image pickup device according to claim 1, further comprising a fourth control unit for controlling an operation of each of said analog/digital conversion units.

16. A solid-state image pickup device according to claim 1, further comprising a buffer memory unit for temporarily storing the digital signals output from each of said analog/digital conversion units and outputting the digital signals.

17. A solid-state image pickup device according to claim 1, further comprising a fifth control unit for controlling an operation of said buffer memory unit.

18. A solid-state image pickup device according to claim 1, further comprising:

a color filter disposed for each of said photoelectric conversion elements thereover; and

a micro lens disposed for each of said color filters thereover.