Variable length decoder for decoding digitally encoded video signals
First Claim
1. A variable length table decoder for decoding compressed video data using variable length code tables, wherein the compressed video data includes variable length encoded data representing an image area of a transmitted frame, the variable length table decoder being coupled to a memory which stores variable length encoded date and a shifter circuit associated with the memory which makes a predetermined number of bits of the variable length encoded data visible, comprising:
- a pattern match circuit coupled to the memory for identifying a unique prefix pattern in the variable length encoded data, each unique prefix pattern having a prefix pattern length;
variable length code table data including a decoded value associated with each of a plurality of variable length codes, wherein the variable length code table data comprises a plurality of subtable data circuits each associated with a unique prefix pattern in the variable length codes and independent of the prefix pattern length;
a datapath coupling the memory to each of the subtable data circuits for applying variable length encoded data to each of the subtable data circuits; and
control circuitry responsive to the pattern match circuit for obtaining a decoded value from the subtable data circuit associated with the unique prefix pattern in the variable length codes that matches the identified prefix pattern in the variable length encoded data, and additional data in the variable length codes after the unique prefix pattern that matches additional data in the variable length encoded data after the identified prefix pattern.
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Abstract
A variable length decoder (VLD) for decoding MPEG-1 and -2 syntax compliant video bit streams. The VLD includes a micro-sequencer and VLD command decode/execution unit for controlling the MPEG decoding process using a novel instruction set. The instruction set includes a set of commands for decoding the video data and a set of flow control instructions. A rotator/barrel shifter is provided for making a predetermined number of encoded bits from the video bit stream available to the VLD and a variable length table decoder for variable length decoding using the MPEG standard variable length code (VLC) tables. The variable length table decoder shares a prefix pattern matching scheme across all of the VLC tables and organizes the variable length codes into a series of subtables. Each subtable corresponds to one of the unique prefix patterns. Variable length codes are decoded by identifying a leading pattern in the video data bit stream and, in parallel, accessing the subtable corresponding to that leading pattern. Run-length and amplitude level DCT coefficient symbols are stored in compressed form, and decoded as needed by an inverse transform unit. Motion vectors are also stored until needed by a motion compensation unit.
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Citations
11 Claims
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1. A variable length table decoder for decoding compressed video data using variable length code tables, wherein the compressed video data includes variable length encoded data representing an image area of a transmitted frame, the variable length table decoder being coupled to a memory which stores variable length encoded date and a shifter circuit associated with the memory which makes a predetermined number of bits of the variable length encoded data visible, comprising:
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a pattern match circuit coupled to the memory for identifying a unique prefix pattern in the variable length encoded data, each unique prefix pattern having a prefix pattern length;
variable length code table data including a decoded value associated with each of a plurality of variable length codes, wherein the variable length code table data comprises a plurality of subtable data circuits each associated with a unique prefix pattern in the variable length codes and independent of the prefix pattern length;
a datapath coupling the memory to each of the subtable data circuits for applying variable length encoded data to each of the subtable data circuits; and
control circuitry responsive to the pattern match circuit for obtaining a decoded value from the subtable data circuit associated with the unique prefix pattern in the variable length codes that matches the identified prefix pattern in the variable length encoded data, and additional data in the variable length codes after the unique prefix pattern that matches additional data in the variable length encoded data after the identified prefix pattern. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for decoding a stream of compressed video data using variable length code tables, wherein the stream includes a plurality of variable length encoded data representing image areas of transmitted frames, comprising the steps of:
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defining a variable length code table including a decoded value associated with each of a plurality of variable length codes;
defining a plurality of unique prefix patterns associated with the variable length codes, each unique prefix pattern having a prefix pattern length, defining a plurality of subtables, wherein each subtable is associated with one of the unique prefix patterns in the variable length codes and independent of the prefix pattern length, each subtable including at least one decoded value that is associated with the unique prefix pattern and additional data in the variable length code after the unique prefix pattern;
identifying in the variable length encoded data one of the unique prefix patterns associated with the variable length codes; and
obtaining a decoded value from the subtable associated with the unique prefix pattern in the variable length codes that matches the identified prefix pattern in the variable length encoded data, and additional data in the variable length codes after the unique prefix pattern that matches additional data in the variable length encoded data after the identified prefix pattern. - View Dependent Claims (10, 11)
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Specification