Metal gate MOS transistors and methods for making the same

• US 6,936,508 B2
• Filed: 09/12/2003
• Issued: 08/30/2005
• Est. Priority Date: 09/12/2003
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Chambers, James J., Colombo, Luigi, Visokay, Mark
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): MALSAWMA, LALRINFAMKIM HMAR
• Application Number:
  US10/661,130
• Publication Number:
  US 20050059198A1
• Time in Patent Office: 718 Days
• Field of Search: 438/199, 438/591, 438/592, 257/388, 257/407, 257/412
• US Class Current: 438/199
• CPC Class Codes: H01L 21/28088 the final conductor layer next to the insulator being a composite, e.g. TiN
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/665 using self aligned silicidation, i.e. salicide formation of conductive layers comprising silicides H01L21/28518

Abstract

Semiconductor devices and fabrication methods are provided, in which metal transistor gates are provided for MOS transistors. Metal boride is formed above a gate dielectric to create PMOS gate structures and metal nitride is formed over a gate dielectric to provide NMOS gate structures. The metal portions of the gate structures are formed from an initial starting material that is either a metal boride or a metal nitride, after which the starting material is provided with boron or nitrogen in one of the PMOS and NMOS regions through implantation, diffusion, or other techniques, either before or after formation of the conductive upper material, and before or after gate patterning. The change in the boron or nitrogen content of the starting material provides adjustment of the material work function, thereby tuning the threshold voltage of the resulting PMOS or NMOS transistors.

Claims

1. A method of fabricating PMOS and NMOS metal gate structures in a semiconductor device, the method comprising:

forming a gate dielectric in PMOS and NMOS regions above a semiconductor body;

forming a metal nitride above the gate dielectric in the NMOS region;

forming a metal boride above the gate dielectric in the PMOS region;

patterning the metal nitride to form an NMOS gate structure in the NMOS region; and

patterning the metal boride to form a PMOS gate structure in the PMOS region;

wherein forming the metal boride above the gate dielectric in the PMOS region comprises;

forming a metal nitride above the gate dielectric in the PMOS region; and

introducing boron into the metal nitride to form the metal boride in the PMOS region.

2. The method of claim 1, wherein introducing boron into the metal nitride in the PMOS region comprises selectively implanting boron or boron-containing dopants into the metal nitride to form the metal boride in the PMOS region.

3. The method of claim 2, wherein the boron or boron-containing dopants are implanted into the metal nitride in the PMOS region prior to forming a conductive upper material above the metal boride in the PMOS region.

4. The method of claim 1, further comprising:

forming a conductive upper material above the metal nitride in the NMOS region; and

forming a conductive upper material above the metal boride in the PMOS region;

wherein the conductive upper material is formed in the PMOS region prior to introducing boron into the metal nitride in the PMOS region.

5. The method of claim 4, wherein the conductive upper material is poly-silicon, and wherein introducing boron into the metal nitride in the PMOS region comprises selectively implanting boron or boron-containing dopants through the poly-silicon and into the metal nitride to form the metal boride in the PMOS region.

6. The method of claim 4, wherein the conductive upper material is poly-silicon, and wherein introducing boron into the metal nitride in the PMOS region comprises:

implanting boron or boron-containing dopants into the poly-silicon in the PMOS region; and

diffusing at least some of the boron or boron-containing dopants from the poly-silicon into the metal nitride to form the metal boride in the PMOS region.

7. The method of claim 1, wherein introducing boron into the metal nitride in the PMOS region comprises exposing the metal nitride to a boron-containing ambient to form the metal boride in the PMOS region.

8. The method of claim 7, wherein introducing boron into the metal nitride in the PMOS region comprises annealing the metal nitride in a boron-containing ambient to form the metal boride in the PMOS region.

9. The method of claim 7, wherein introducing boron into the metal nitride in the PMOS region comprises exposing the metal nitride to a plasma in the boron-containing ambient to form the metal boride in the PMOS region.

10. The method of claim 1, wherein introducing boron into the metal nitride in the PMOS region comprises:

forming a boron-containing material over the metal nitride; and

diffusing boron from the boron-containing material into the metal nitride to form the metal boride in the PMOS region.

11. The method of claim 1, wherein the metal nitride is one of M_XN_Y, M_XSi_YN_Z, M_XAl_YN_Z, and M_WAl_XSi_YN_Z, where M is one of Ti, Ta, Hf, Zr, and W.

12. The method of claim 1, wherein the metal boride is one of M_XB_Y, M_XSi_YB_Z, M_XAl_YB_Z, and M_WAl_XSi_YB_Z where M is one of Ti, Ta, Hf, Zr, and W.

13. The method of claim 1, wherein the metal nitride is TiN and the metal boride is TiB₂.

14. A method of fabricating PMOS and NMOS metal gate structures in a semiconductor device, the method comprising:

forming a gate dielectric in PMOS and NMOS regions above a semiconductor body;

forming a metal nitride above the gate dielectric in the NMOS region;

forming a metal boride above the gate dielectric in the PMOS region;

patterning the metal nitride to form an NMOS gate structure in the NMOS region; and

patterning the metal boride to form a PMOS gate structure in the PMOS region;

wherein forming metal nitride above the gate dielectric in the NMOS region comprises;

forming metal boride above the gate dielectric in the NMOS region; and

introducing nitrogen into the metal boride to form the metal nitride in the PMOS region.

15. The method of claim 14, wherein introducing nitrogen into the metal boride comprises performing an ammonia anneal to form the metal nitride in the PMOS region.

16. The method of claim 14, wherein introducing nitrogen into the metal boride comprises performing a plasma nitridation process to form the metal nitride in the PMOS region.

17. The method of claim 14, wherein the metal nitride is one of M_XN_Y, M_XSi_YN_Z, M_XAl_YN_Z, and M_WAl_XSi_YN_Z, where M is one of Ti, Ta, Hf, Zr, and W.

18. The method of claim 14, wherein the metal boride is one of M_XB_Y, M_XSi_YB_Z, M_XAl_YB_Z, and M_WAl_XSi_YB_Z where M is one of Ti, Ta, Hf, Zr, and W.

19. The method of claim 14, wherein the metal nitride is TiN and the metal boride is TiB₂.

20. A method of fabricating PMOS and NMOS metal gate structures in a semiconductor device, the method comprising:

forming a gate dielectric on PMOS and NMOS regions above a semiconductor body;

forming a starting material above the gate dielectric in both the NMOS region and the PMOS region, the starting material being a metal nitride or a metal boride;

changing the starting material in a first one of the NMOS region and the PMOS region such that a metal nitride is provided above the gate dielectric in the NMOS region and a metal boride is provided above the gate dielectric in the PMOS region;

patterning the metal nitride to form an NMOS gate structure in the NMOS region; and

patterning the metal boride to form a PMOS gate structure in the PMOS region.

21. The method of claim 20, wherein the starting material is a metal nitride, and wherein changing the starting material comprises introducing boron into the starting material in the PMOS region to change the starting material to a metal boride in the PMOS region.

22. The method of claim 20, wherein the starting material is a metal boride, and wherein changing the starting material comprises introducing nitrogen into the starting material in the NMOS region to change the starting material to a metal nitride in the NMOS region.

23. A semiconductor device comprising:

an NMOS transistor gate structure, the NMOS gate structure comprising a metal nitride structure and a gate dielectric between the metal nitride structure and a semiconductor body; and

a PMOS transistor gate structure, the PMOS gate structure comprising a metal boride structure and a gate dielectric between the metal boride structure and the semiconductor body, wherein the metal boride structure comprises a metal nitride material doped with boron.

24. The device of claim 23, wherein the metal boride structure is one of M_XB_Y, M_XSi_YB_Z, M_XAl_YB_Z, and M_WAl_XSi_YB_Z where M is one of Ti, Ta, Hf, Zr, and W.

25. The device of claim 23, wherein the metal nitride structure comprises TiN and the metal boride structure comprises TiB₂.

26. The device of claim 23, further comprising a conductive upper material above the metal nitride structure and above the metal boride structure.

27. The device of claim 26, wherein the conductive upper material is poly-silicon.

28. The device of claim 26, wherein the conductive upper material is tungsten.

29. A semiconductor device comprising:

an NMOS transistor gate structure, the NMOS gate structure comprising a metal nitride structure and a gate dielectric between the metal nitride structure and a semiconductor body; and

a PMOS transistor gate structure, the PMOS gate structure comprising a metal boride structure and a gate dielectric between the metal boride structure and the semiconductor body, wherein the metal nitride structure comprises a nitrided metal boride.

30. The device of claim 29, wherein the metal nitride structure is one of M_XN_Y, M_XSi_YN_Z, M_XAl_YN_Z, and M_WAl_XSi_YN_Z, where M is one of Ti, Ta, Hf, Zr, and W.