Integrated circuit package and method of manufacturing the integrated circuit package

• US 6,940,154 B2
• Filed: 06/24/2002
• Issued: 09/06/2005
• Est. Priority Date: 06/24/2002
• Status: Active Grant

• Current Assignee: Utac Headquarters Pte. Ltd (UTAC Holdings Ltd.)
• Original Assignee: ASAT Company Limited
• Inventors: McLellan, Neil Robert, Yee, Lin Tsui, Pedron, Serafin
• Primary Examiner(s): Clark, Jasmine J
• Application Number:
  US10/178,372
• Publication Number:
  US 20030234454A1
• Time in Patent Office: 1,170 Days
• Field of Search: 257/666, 257/781, 257/784, 257/786
• US Class Current: 257/666
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48257 connecting the wire to a die pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/78301 Capillary
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/85181 connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/49503 characterised by the die pad
• CPC Class Codes: H01L 23/49548 Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/10161 : with a rectangular active surface
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/18301 : being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part

Abstract

The present invention relates to an integrated circuit package and method of manufacturing an integrated circuit package. In one aspect, the present invention relates to an integrated circuit package including a lead frame having a lead with an inner pad and an outer pad connected by a connection member, wherein a region of the inner pad and a region of the outer pad are separated by a channel extending through a width of the lead. Such an integrated circuit package further includes a semiconductor die electrically coupled with the inner pad of the lead, and an encapsulant material encapsulating at least a portion of said lead frame, wherein a portion of said outer pad is exposed. In another aspect, the present invention relates to a method including providing a matrix of lead frames, each of the lead frames having a lead, forming a channel extending through a width of the lead to create an inner pad, an outer pad and a connection member in the lead, electrically coupling a semiconductor die with the inner pad, and encapsulating at least a portion of the lead frame such that at least a portion of the outer pad is exposed.

Claims

1. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead;

a wire attached between said semiconductor die and said inner pad; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein a length of said wire is about 150 mils or less.

2. The integrated circuit package of claim 1, wherein said connection member is integral with said inner pad.

3. The integrated circuit package of claim 2, wherein said connection member is integral with said outer pad.

4. The integrated circuit package of claim 1, wherein said lead is one of a plurality of inwardly projecting leads, each lead comprising an inner pad, and said inner pad of at least one of said leads projects further inward than another of said inner pads of said leads.

5. The integrated circuit package of claim 1, wherein said lead is one of a plurality of leads, each lead comprising an inner pad and an outer pad, and a distance between adjacent inner pads is less than a distance between adjacent outer pads.

6. The integrated circuit package of claim 1, wherein said encapsulant further encapsulates substantially all of said connection member.

7. The integrated circuit package of claim 1

wherein said connection member is integral with said inner pad and said outer pad;

wherein said connection member has a thickness that is approximately half a thickness of said lead;

wherein said encapsulant further encapsulates substantially all of said connection member; and

wherein a thickness of said inner pad is substantially equal to a thickness of said outer pad.

8. The integrated circuit package of claim 7, wherein said lead is one of a plurality of inward projecting leads, each lead comprising an inner pad, and said inner pad of at least one of said leads projects further inward than another of said inner pads of said leads.

9. The integrated circuit package of claim 7, wherein said lead is one of a plurality of leads, each lead comprising an inner pad and an outer pad, and a distance between adjacent inner pads is less than a distance between adjacent outer pads.

10. The integrated circuit package of claim 7, wherein said lead is one of a plurality of leads, each lead comprising an inner pad, and a width of at least one inner pad is less than a width of another inner pad.

11. The integrated circuit package of claim 7, further comprising a second semiconductor die electrically coupled with a second inner pad of a second lead.

12. The integrated circuit package of claim 1, wherein said encapsulant material comprises an epoxy-based material.

13. The integrated circuit package of claim 4, further comprising a die attachment pad configured to accommodate a contour defined by said inner pads of said leads.

14. The integrated circuit package of claim 1:

wherein said lead is one of a plurality of inwardly projecting leads, each lead comprising an inner pad, and

wherein said package further comprises a die attachment pad configured to accommodate a contour defined by said inner pads of said leads.

15. The integrated circuit package of claim 1, wherein said lead is one of a plurality of leads, each lead comprising an inner pad and an outer pad, wherein said inner pads are spaced more closely together than said outer pads.

16. The method of claim 1, wherein said encapsulating comprises employing a liquid encapsulating process.

17. The method of claim 1, wherein said encapsulating comprises employing a transfer molding process.

18. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein said connection member has a thickness that is approximately half a thickness of said lead.

19. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead;

an encapsulant material encapsulating at least a portion of said lead frame; and

a solder member attached to an exposed portion of said outer pad.

20. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein said lead is one of a plurality of leads, each lead comprising an inner pad, and a width of at least one inner pad is less than a width of another inner pad.

21. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead;

an encapsulant material encapsulating at least a portion of said lead frame; and

a second semiconductor die electrically coupled with a second inner pad of a second lead.

22. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein a thickness of said inner pad is substantially equal to a thickness of said outer pad.

23. An integrated circuit package, comprising:

a lead frame comprising a plurality of inwardly projecting leads, each of said leads comprising an inner pad and an outer pad, wherein a region of said inner pad and a region of said outer pad is separated by a channel extending through a width of said lead and connected by a connection member integral with said inner pad and said outer pad, said connection member having a thickness that is approximately half a thickness of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame.

24. The integrated circuit package of claim 23, wherein a portion of said outer pad is exposed.

25. A method, comprising:

providing a matrix of lead frames, each of said lead frames comprising a lead;

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead;

electrically coupling a semiconductor die with said inner pad;

encapsulating at least a portion of said lead frame; and

singulating said matrix to form a plurality of packages.

26. The method of claim 25, wherein said singulating comprises a saw singulation.

27. The method of claim 25, wherein said lead frames are substantially identical.

28. A method, comprising:

providing a lead frame comprising a lead;

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead;

electrically coupling a semiconductor die with said inner pad; and

encapsulating at least a portion of said lead frame,

wherein said forming comprises etching said channel into said lead.

29. The method of claim 28, wherein said etching comprises a chemical etching process.

30. The method of claim 28, wherein said etching comprises etching said channel to a thickness of approximately half a thickness of said lead.

31. A method, comprising:

providing a lead frame comprising a lead;

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead;

electrically coupling a semiconductor die with said inner pad;

encapsulating at least a portion of said lead frame; and

attaching a solder member to said outer pad.

32. A method, comprising:

providing a lead frame comprising a lead;

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead;

electrically coupling a semiconductor die with said inner pad; and

encapsulating at least a portion of said lead frame,

wherein said electrically coupling comprises attaching a wire between said semiconductor die and said inner pad by a thermo-sonic bonding process.

33. The method of claim 32, wherein said bonding process comprises attaching said wire to a top side of said inner pad while a support contacts a bottom side of said inner pad and a bottom side of said outer pad.

34. The method of claim 33, wherein said support is a substantially flat plate.

35. A lead frame, comprising:

a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead,

wherein a thickness of said inner pad is substantially equal to a thickness of said outer pad.

36. The lead frame of claim 35, wherein said connection member has a thickness that is approximately half a thickness of said lead.

37. The lead frame of claim 35, wherein said connection member is integral with said inner pad.

38. The lead frame of claim 37, wherein said connection member is integral with said outer pad.

39. The lead frame of claim 35, wherein said lead is one of a plurality of inwardly projecting leads, each lead comprising an inner pad, and said inner pad of at least one of said leads projects further inward than another of said inner pads of said leads.

40. The lead frame of claim 35, wherein said lead is one of a plurality of leads, each lead comprising an inner pad and an outer pad, and a distance between adjacent inner pads is less than a distance between adjacent outer pads.

41. The lead frame of claim 35, wherein said lead is one of a plurality of leads, each lead comprising an inner pad, and a width of at least one inner pad is less than a width of another inner pad.

42. The lead frame of claim 35, wherein said lead frame is made of an electrically conductive material.

43. The lead frame of claim 42, wherein said electrically conductive material comprises copper.

44. The lead frame of claim 42, wherein said electrically conductive material comprises a compound.

45. The lead frame of claim 35, wherein a width of said outer pad is about 0.230 mm.

46. The lead frame of claim 45, wherein a length of said outer paid is about 0.550 mm.

47. The lead frame of claim 46, wherein said lead comprises one of a plurality of leads, each lead comprising an outer pad, wherein a pitch of adjacent outer pads is about 0.500 mm.

48. The lead frame of claim 35, wherein said lead is one of a plurality of leads, each lead comprising an inner pad and an outer pad, wherein said inner pads are spaced more closely together than said outer pads.

49. A lead frame, comprising:

a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead,

wherein said connection member has a thickness that is approximately half a thickness of said lead.

50. An integrated circuit package comprising a lead frame, comprising:

a lead comprising a means for connecting an inner pad and an outer pad of said lead, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

a wire attached between said semiconductor die and said inner pad, wherein a length of said wire is about 150 mils or less.

51. The integrated circuit package of claim 50, wherein said lead is one of a plurality of inwardly projecting leads, each lead comprising an inner pad, and said inner pad of at least one of said leads projects further inward than another of said inner pads of said leads.

52. The integrated circuit package of claim 50, wherein said lead is one of a plurality of leads, each lead comprising an inner pad and an outer pad, and a distance between adjacent inner pads is less than a distance between adjacent outer pads.

53. The integrated circuit package of claim 50, further comprising an encapsulant material encapsulating at least a portion of said lead frame.

54. The integrated circuit package of claim 53, wherein a portion of said outer pad is exposed.

55. The integrated circuit package of claim 53, further comprising a semiconductor die electrically coupled with said inner pad of said lead.

56. The integrated circuit package of claim 53, wherein said encapsulant further encapsulates substantially all of said connection member.

57. The integrated circuit package of claim 50, wherein said lead is one of a plurality of leads, each lead comprising an inner pad, and wherein said package further comprises a plurality of semiconductor dies electrically coupled with said inner pads.

58. The integrated circuit package of claim 50,

wherein said lead is one of a plurality of inwardly projecting leads, each lead comprising an inner pad, and

wherein said package further comprises a die attachment pad configured to accommodate a contour defined by said inner pads of said leads.

59. An integrated circuit package comprising a lead frame, comprising:

a lead comprising a means for connecting an inner pad and an outer pad of said lead, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead, and

wherein said lead is one of a plurality of leads, each lead comprising an inner pad, and a width of at least one inner pad is less than a width of another inner pad.

60. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein a portion of said outer pad is exposed.

61. An integrated circuit package comprising a lead frame, comprising:

a lead comprising a means for connecting an inner pad and an outer pad of said lead, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead, and

wherein a thickness of said inner pad is substantially equal to a thickness of said outer pad.

62. A lead frame, comprising:

a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead, and

wherein said lead is one of a plurality of leads, each lead comprising a connection member, and wherein at least two of said connection members have different lengths.

63. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein said lead is one of a plurality of leads, each lead comprising a connection member, and wherein at least two of said connection members have different lengths.

64. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead;

an encapsulant material encapsulating at least a portion of said lead frame; and

a die attachment pad, wherein at least a portion of said die attachment pad is exposed.

65. The integrated circuit package of claim 64, wherein said die attachment pad and said semiconductor die are attached by a soft solder.

66. The integrated circuit package of claim 64, wherein at least a portion of said outer pad is exposed.

67. The integrated circuit package of claim 66, wherein at least a portion of said inner pad is exposed.

68. An integrated circuit package comprising a lead frame, comprising:

a lead comprising a means for connecting an inner pad and an outer pad of said lead, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead; and

a die attachment pad, wherein at least a portion of said die attachment pad is exposed.

69. The integrated circuit package of claim 68, wherein at least a portion of said outer pad is exposed.

70. The integrated circuit package of claim 69, wherein at least a portion of said inner pad is exposed.

71. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein said lead frame is pre-plated with palladium.

72. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein at least a portion of an upper and a lower surface of said lead are plated with solder.

73. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein at least a portion of an upper and a lower surface of said lead are plated with tin.

74. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein said lead is one of a plurality of leads, each lead comprising an inner pad and an outer pad, wherein said outer pads are arranged in a generally angular configuration.

75. The integrated circuit package of claim 74, wherein said inner pads are arranged in a generally angular configuration.

76. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein said inner pad has a planform area smaller than a planform area of said outer pad.

77. A lead frame, comprising:

a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead,

wherein said inner pad has a planform area smaller than a planform area of said outer pad.

78. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame,

wherein said semiconductor die is one of a plurality of semiconductor dies.

79. The integrated circuit package of claim 78, further comprising a die attachment pad attached to said plurality of semiconductor dies.

80. A method, comprising:

providing a matrix of lead frames, each of said lead frames comprising a lead;

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead;

electrically coupling a semiconductor die with said inner pad; and

encapsulating at least a portion of said lead frame,

wherein said matrix of lead frames is one of a plurality of matrices of lead frames formed in a frame area of a strip.

81. The method of claim 80, wherein a periphery of said strip comprises an assembly feature for use in automated assembly equipment.

82. The method of claim 81, wherein said assembly feature comprises an alignment target.

83. The method of claim 81, wherein said assembly feature comprises a tooling hole.

84. A method, comprising:

creating a lead from a sheet; and

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead,

wherein said creating comprises stamping.

85. The method of claim 84, wherein said sheet comprises a metal.

86. The method of claim 85, wherein said metal comprises copper.

87. The method of claim 84, wherein said creating further comprises creating a plurality of leads in a generally annular configuration, each lead comprising an inner pad, an outer pad and a connection member.

88. The method of claim 87, wherein said creating further comprises creating a die attachment pad.

89. The method of claim 88, further comprising mounting a semiconductor die on said die attachment pad.

90. The method of claim 89, further comprising mounting a second semiconductor die on said die attachment pad.

91. A method, comprising:

creating a lead from a sheet; and

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead,

wherein said forming comprises etching said channel into said lead.

92. The method of claim 91, wherein said etching comprises a chemical etching process.

93. The method of claim 91, wherein said etching comprises etching said channel to a thickness of approximately half a thickness of said lead.

94. The method of claim 92, wherein said chemical etching process comprises masking a portion of said lead.

95. The method of claim 91, wherein said creating further comprises creating a plurality of leads in a generally annular configuration, each lead comprising an inner pad, an outer pad and a connection member.

96. The method of claim 91, wherein said creating further comprises creating a die attachment pad.

97. A method, comprising:

creating a lead from a sheet;

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead; and

electrically coupling a semiconductor die with said inner pad.

98. The method of claim 97, further comprising attaching a solder member to said outer pad.

99. The method of claim 97, wherein said electrically coupling comprises attaching a wire between said semiconductor die and said inner pad by a thermo-sonic bonding process;

and

wherein said bonding process comprises attaching said wire to a top side of said inner pad while a support contacts a bottom side of said inner pad and bottom side of said outer pad.