Display module driving system and digital to analog converter for driving display

• US 6,940,496 B1
• Filed: 06/04/1999
• Issued: 09/06/2005
• Est. Priority Date: 06/04/1998
• Status: Expired due to Term

• Current Assignee: Lattice Semiconductor Corporation
• Original Assignee: Silicon Image, Inc. (Lattice Semiconductor Corporation)
• Inventors: Kim, Eun-Gu
• Primary Examiner(s): Wu, Xiao
• Assistant Examiner(s): ABDULSELAM, ABBAS I
• Application Number:
  US09/326,503
• Time in Patent Office: 2,286 Days
• Field of Search: 345/204, 345/151, 345/152, 345/154, 345/100, 345/103, 345/800, 345/98, 345/212, 315/169.1, 315/170, 712/10, 712/11, 341/144, 348/536
• US Class Current: 345/204
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2352/00 Parallel handling of streams of display data
• CPC Class Codes: G09G 2370/08 Details of image data interface between the display device controller and the data line driver circuit
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A display module driving system wherein digital pixel data for an image to be displayed is provided to a plurality of column drivers on a row by row basis in serial format over a plurality of dedicated bus lines rather than a single parallel bus line. Digital pixel data for a complete image row is divided into segments, wherein the number of segments is each to the number of column drivers. Each segments is then serialized and transmitted to a corresponding column driver such that the digital pixel data for an entire row is transferred to each of the plurality of column drivers at the same time. The column drivers receive the segments and rearrange the data into parallel. The pixels are then transferred to a digital to analog converter, preferably two pixels at a time, where each pixel is converted into analog red, green and blue signals. An analog sample and hold module samples each analog signal for all of the pixels in a given row of the display and stores the signals in first capacitors of a plurality of sample and hold capacitor pairs. The sample and hold capacitor pairs allow analog signals to be sampled and held on a row by row basis such that when one capacitor in each pair stores one of the analog red, green and blue voltages for a subsequent row, the other capacitor transfers the analog voltage signal out for a current row to the column electrodes of the display.

Claims

1. A display drive system comprising:

a plurality of column drivers;

a plurality of dedicated serial buses, each dedicated serial bus coupled to one of the column drivers; and

a timing controller coupled to each column driver in the plurality of column drivers by the plurality of dedicated serial buses, for providing a row of digital pixel data to the plurality of column drivers, wherein the digital pixel data is divided into segments and each segment is serially provided to one of the column drivers in the plurality of column drivers via the dedicated serial bus coupled between the timing controller and the column driver such that the entire row of digital pixel data is provided to the plurality of column drivers at the same time;

wherein each segment contains two adjacent pixels of data.

2. The display drive system of claim 1, wherein each column driver in the plurality of column drivers comprises a serial to parallel converter which receives the serially provided segment of digital pixel data and rearranges the segment into parallel pixel data until all of the pixels in the segment have been received and arranged into parallel.

3. The display drive system of claim 2, wherein each column driver in the plurality of column drivers further comprises a digital to analog converter module coupled to the serial to parallel converter, for converting each pixel in the parallel pixel data into analog red, green and blue signals.

4. The display drive system of claim 3 wherein the digital to analog converter module converters the parallel pixel data into analog red, green and blue signals two pixels at a time, such that there are six digital to analog converters within the digital to analog converter module, with a first digital to analog converter generating an analog red signal for a first pixel, a second digital to analog converter generating an analog green signal for the first pixel, a third digital to analog converter generating an analog blue signal for the first pixel, a fourth digital to analog converter generating an analog red signal for a second pixel, a first digital to analog converter generating an analog green signal for the second pixel, and a sixth digital to analog converter generating an analog blue signal for the second pixel.

5. The display drive system of claim 3, wherein each column driver in the plurality of column drivers further comprises an analog sample and hold module coupled to the digital to analog converter module for sampling the analog red, green and blue signals for each pixel in the parallel pixel data, one group of pixels at a time.

6. The display driver system of claim 5, wherein the analog sample and hold module samples the analog red, green and blue signals of each pixel in the parallel pixel data, two pixels at a time such that a total of six analog signals are sampled at the same time.

7. The display driver system of claim 5, wherein the analog sample and hold module includes a plurality of first capacitors, one first capacitor for sampling each red, green and blue signal for each pixel in the group of pixels.

8. The display driver system of claim 5, wherein the analog sample and hold circuit includes a plurality of first and second capacitor pairs, each first capacitor for sampling the red green and blue signal for each pixel in the group of pixels from parallel pixel data for a first display row, each second capacitor for sampling the analog red, green and blue signals for each pixel in the group of pixels from parallel pixel data in a next display row.

9. The display driver system of claim 8, with each first capacitor providing the sampled analog red, green and blue signals to a plurality of column electrodes while each second capacitor samples the analog red, green and blue signals for each pixel in the group of pixels from parallel pixel data in the next display row.

10. A system for driving a display comprising:

a plurality of separate bus lines;

a timing controller coupled to each of the plurality of separate bus lines, the timing controller for receiving digital pixel data, dividing the digital pixel data into a plurality of segments of digital pixel data and serially providing the plurality of segments to a plurality of column drivers simultaneously;

wherein each segment contains two adjacent pixels of data and

a plurality of column drivers, each column driver coupled to the timing controller via one of the separate bus lines, wherein each column driver receives a particular segment in the plurality of segments via the separate bus line, and further wherein each column driver switches the serially provided segment of digital pixel data into parallel digital pixel data, converts the parallel digital pixel data into analog signals, and provides the analog signals to a plurality of column electrodes for driving the display.

11. The system of claim 10, wherein the timing controller comprises:

a pair of first and second memory modules for receiving and storing the digital pixel data, wherein a first row of digital pixel data is stored in the first memory module and a second row of digital pixel data is stored the second memory module;

a data path control circuit coupled to the pair of first and second memory modules for routing the first row of digital pixel data to the first memory module and routing the second row of digital pixel data to the second memory module; and

a parallel to serial converter coupled to the pair of first and second memory modules for retrieving the first row of digital pixel data from the first memory module in a parallel format, dividing the digital pixel data into a plurality of segments, converting each segment from parallel format into serial format, and providing each segment in the plurality of segments to a corresponding column driver in the plurality of column drivers via the separate bus line.

12. The system of claim 11, wherein an enable signal is coupled between the timing controller and each column driver in the plurality of column drivers and is used to activate each column driver, thereby allowing the plurality of column drivers to receive their respective segments at the same time.

13. The system of claim 10, wherein each column driver in the plurality of column drivers comprises:

a serial to parallel converter for receiving the segment of serially formatted digital pixel data over the separate bus line and converting the segment into a parallel format one pixel at a time;

a digital to analog converter coupled to the serial to parallel converter for converting each pixel in the parallel formatted segment of digital pixel data into analog red, green and blue signals;

an analog sample and hold module coupled between the digital to analog converter and the plurality of column electrodes for sampling the analog red, green and blue signals of each pixel, storing the sampled analog red, green and blue signals, and releasing the samples of the analog red, green and blue signals to the plurality of column electrodes for driving the display.

14. The system of claim 13 wherein the digital to analog converter module converters each pixel in the parallel formatted segment of digital pixel data into analog red, green and blue signals two pixels at a time, such that there are at least six digital to analog converters within the digital to analog converter module, with a first digital to analog converter generating an analog red signal for a first pixel, a second digital to analog converter generating an analog green signal for the first pixel, a third digital to analog converter generating an analog blue signal for the first pixel, a fourth digital to analog converter generating an analog red signal for a second pixel, a fifth digital to analog converter generating an analog green signal for the second pixel, and a sixth digital to analog converter generating an analog blue signal for the second pixel.

15. The system of claim 13, wherein the analog sample and hold module samplers the analog red, green and blue signals of each pixel, two pixels at a time such that a total of six analog signals are sampled at the same time.

16. The system of claim 13, wherein the analog sample and hold module includes a plurality of sample and bold capacitor pairs having a first capacitor and a second capacitor, and farther wherein the first capacitor and the second capacitor in each analog sample and hold module alternately store and release the samples of the analog red, green and blue signals.

17. A timing controller for controlling a plurality of column drivers through a plurality of separate bus lines, each column driver coupled to the timing controller via a corresponding separate bus line of the plurality of separate bus lines, in order to drive a display, the timing controller comprising:

a pair of first and second memory modules for receiving and storing digital pixel data, wherein a first row of digital pixel data is stored in the first memory module and a second row of digital pixel data is stored in the second memory module;

a parallel to serial converter for retrieving the first row of digital pixel data from the first memory module in a parallel format, dividing the digital pixel data into segments, wherein each segment is two adjacent pixels of data, converting each segment from parallel format into serial format, and simultaneously providing each segment of the serially formatted first row of digital pixel data to a corresponding column driver in the plurality of column drivers via the corresponding separate bus line.

18. A column driver for driving a plurality of column electrodes of a display, comprising:

a serial to parallel converter for serially receiving digital pixel data representing a segment of a display row and converting the digital pixel data into a parallel format;

a digital to analog converter coupled to the serial to parallel converter for receiving the parallel formatted digital pixel data and converting the parallel formatted digital pixel data into analog signals;

an analog sample and hold circuit for sampling the analog signals, storing the samples and providing the samples of the analog signals to a plurality of column electrodes for driving the display wherein the analog sample and hold circuit includes a plurality of capacitor pairs having a first capacitor and a second capacitor such that each capacitor may alternately store the analog signal samples and provide the samples to the column electrodes.

19. A method for driving a display comprising the steps of

receiving a current row of digital pixel data and storing the current row of digital pixel data in a first memory module;

retrieving the current row of digital pixel data in parallel format from the first memory module, dividing the current row of digital pixel data into a number of current row segments, converting each current row segment into a current row serial data stream; and

providing each current row serial data stream to a corresponding column driver in a plurality of column drivers, wherein each current row serial data stream is provided to a corresponding column driver via a dedicated bus line;

receiving each current row serial data stream at the corresponding column driver and converting the current row serial data stream into current row parallel digital data one pixel at a time;

converting the current row parallel digital data into current row analog red, green and blue signals two adjacent pixels at a time; and

sampling the current row analog red, green and blue signals and holding the samples; and

providing the samples to a plurality of column electrodes for driving display.

20. The method of claim 19, comprising the further steps of:

receiving a next row of digital pixel data and storing the next row of digital pixel data in a second memory module, and performing this step while the steps of retrieving the current row of digital pixel data from the first memory module and providing each current row serial data stream are being performed;

retrieving the next row of digital pixel data in parallel from the second memory module, dividing the next row of digital pixel data into a number of next row segments, converting each next row segment into a next row serial data stream; and

providing each next row serial data stream to a corresponding column driver in the plurality of column drivers, wherein each next row serial data stream is provided to a corresponding column driver via a dedicated bus line.

21. The method of claim 20, further comprising the steps of:

receiving each next row serial data stream at the corresponding column driver and converting the next row serial data stream into parallel digital data one pixel at a time;

converting the parallel digital data into analog red, green and blue signals two adjacent pixels at a time;

sampling the analog red, green and blue signals and holding the samples;

and providing the samples to the plurality of column electrodes for driving the display.