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Programmable analog system architecture

  • US 6,941,336 B1
  • Filed: 07/18/2001
  • Issued: 09/06/2005
  • Est. Priority Date: 10/26/2000
  • Status: Expired due to Term
First Claim
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1. A multi-functional device comprising:

  • a bus;

    a random access memory (RAM) coupled to said bus;

    a central processing unit (CPU) coupled to said bus; and

    a plurality of analog blocks coupled to said bus, wherein said bus, RAM, CPU and analog blocks reside on a single chip;

    said plurality of analog blocks comprising a first set of analog blocks that is selectively and electrically couplable to and decouplable from another analog block in said plurality of analog blocks;

    wherein said analog blocks are selectively and electrically coupled to implement a particular analog function, wherein different analog functions are implemented by electrically coupling different combinations of said analog blocks.

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