Variable rate modulator

• US 6,944,250 B2
• Filed: 08/22/2003
• Issued: 09/13/2005
• Est. Priority Date: 10/09/1997
• Status: Expired due to Term

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Laskowski, Joseph L., Samueli, Henry
• Primary Examiner(s): Bayard, Emmanuel
• Application Number:
  US10/646,971
• Publication Number:
  US 20040037368A1
• Time in Patent Office: 753 Days
• Field of Search: 375/306, 375/298, 375/307, 375/371, 375/375, 375/329, 327/164, 327/165, 327/172, 327/178, 327/295, 327/296, 708/290, 331/46, 331/18, 331/47
• US Class Current: 375/375
• CPC Class Codes: H04L 27/362 Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence

Abstract

Digital data signals at a variable input frequency are converted by a numerically controlled oscillator and an interpolator to a signal at a fixed output sampling frequency. The conversion of the variable input frequency to the fixed output sampling frequency may be by a factor other than an integer. The interpolated digital data signals at the fixed output sampling frequency are then modulated into a pair of trigonometric signals at a programmable carrier frequency, one signal having a cosine function and the other signal having a sine function. The modulated signals at the fixed output sampling frequency are then combined to create a modulated signal at a carrier frequency determined by the frequency of the sine and cosine signals. The modulated signal is sampled at the fixed output sampling frequency and converted to a corresponding analog signal using a digital-to-analog converter.

Claims

1. A signal processing system for converting a variable frequency input signal to a fixed frequency output signal comprising:

means for generating a first clock signal at a first clock frequency;

means for receiving a frequency control signal that corresponds to a second frequency;

means for generating a second clock signal at the second frequency as a function of said frequency control signal;

means for generating a phase offset signal representing an offset in phase between the first clock signal and the second clock signal; and

means for converting the variable frequency input signal to an interpolated signal at a fixed sampling frequency in accordance with said phase offset signal, wherein the interpolated signal is interpolated by a value of M/N where M and N are integers.

2. The signal processing system of claim 1 further comprising:

means for modulating the interpolated signal onto trigonometric signals; and

means for converting the modulated signal to an analog signal.

3. The signal processing system of claim 1 wherein the means for converting a variable frequency input signal to an interpolated signal at a fixed sampling frequency in accordance with said phase offset signal comprises an interpolator that interpolates the variable frequency input signal by a non-integer value.

4. The signal processing system of claim 1 wherein the means for converting a variable frequency input signal to an interpolated signal at a fixed sampling frequency in accordance with said phase offset signal comprises an interpolator that interpolates the variable frequency input signal by an integer value.

5. A signal processing system for converting a variable frequency input signal to an output signal having a fixed output frequency, comprising:

means for generating a clock signal at a clock frequency equal to baud rate of said variable frequency input signal as a function of a frequency control signal;

means for generating a phase offset signal representing an offset in phase between a recipient clock signal and the clock signal; and

means for converting the variable frequency input signal to an interpolated signal at a fixed sampling frequency in accordance with said phase offset signal, wherein the interpolated signal is interpolated by a value of M/N where N and N are integers.

6. A signal processing system, comprising:

means for providing a first clock signal at a first clock frequency;

oscillator means, responsive to a frequency control signal and the first clock signal for providing an output clock signal at a fixed second clock frequency and a phase offset signal representing an offset in phase between the first clock signal and the second clock signal, and

interpolation means for offsetting a pair of variable frequency input signals in accordance with the phase offset signal to provide an interpolated signal at a fixed output sampling frequency, wherein the interpolated signal is interpolated by a value of M/N where M and N are integers.

7. The signal processing system of claim 6 wherein the phase offset signal is greater than or equal to zero and less than one.

8. The signal processing system of claim 6 wherein the interpolation means interpolates the variable frequency input signal by a non-integer value.

9. The signal processing system of claim 6 wherein the interpolation means interpolates the variable frequency input signal by an integer value.

10. The signal processing system of claim 6 further comprising a modulator for modulating the interpolated signal onto a trigonometric signal at a carrier frequency.

11. The signal processing system of claim 10 further comprising a digital to analog converter for converting the modulated signal to an analog signal.

12. The signal processing system of claim 6 wherein said interpolation means includes a register, responsive to said second clock signal, to provide said pair of variable frequency input signals.