Method of forming the integrated circuit having a die with high Q inductors and capacitors attached to a die with a circuit as a flip chip
First Claim
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1. A method of forming an integrated circuit, the method comprising the steps of:
- forming a first die from a first wafer, the first die having;
a substrate with an electrical circuit;
an interconnect formed on the substrate and electrically connected to the electrical circuit;
a passivation layer formed on the interconnect;
a plurality of first bonding pads formed on the passivation layer, the first bonding pads being electrically connected to the interconnect; and
a plurality of second bonding pads formed on the passivation layer, the second bonding pads being electrically connected to the interconnect;
forming a second die from a second wafer, the second die having;
a micro-electromechanical structure having an inductance; and
a plurality of third bonding pads, the micro-electromechanical structure being connected to a third bonding pad; and
attaching the third bonding pads of the second die to the second bonding pads of the first die.
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Abstract
A semiconductor integrated circuit with high Q inductors and capacitors is disclosed. A semiconductor electrical circuit is formed on a first die, while micro-electromechanical structures having inductance and capacitance are formed on a second die. The second die is attached and electrically connected to the first die as a flip chip.
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Citations
17 Claims
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1. A method of forming an integrated circuit, the method comprising the steps of:
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forming a first die from a first wafer, the first die having; a substrate with an electrical circuit; an interconnect formed on the substrate and electrically connected to the electrical circuit; a passivation layer formed on the interconnect; a plurality of first bonding pads formed on the passivation layer, the first bonding pads being electrically connected to the interconnect; and a plurality of second bonding pads formed on the passivation layer, the second bonding pads being electrically connected to the interconnect; forming a second die from a second wafer, the second die having; a micro-electromechanical structure having an inductance; and a plurality of third bonding pads, the micro-electromechanical structure being connected to a third bonding pad; and attaching the third bonding pads of the second die to the second bonding pads of the first die. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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Specification