Methods for manufacturing storage nodes of stacked capacitors

• US 6,946,341 B2
• Filed: 12/04/2002
• Issued: 09/20/2005
• Est. Priority Date: 12/05/2001
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Joo, Jae-hyun, Kim, Wan-don
• Primary Examiner(s): TSAI, H JEY
• Application Number:
  US10/313,911
• Publication Number:
  US 20030142458A1
• Time in Patent Office: 1,021 Days
• Field of Search: 438/3, 438238-256, 438/381, 438390-399
• US Class Current: 438/240
• CPC Class Codes: H01L 28/60 Electrodes

Abstract

Methods for forming a stacked capacitor include forming a first dielectric layer having a contact plug therein on an integrated circuit substrate. A second dielectric layer including a storage node hole is formed adjacent the contact plug on the first dielectric layer. A conductive layer is deposited into the storage node hole and on the second dielectric layer. The conductive layer has an associated work function. The conductive layer is oxidized to form a conductive oxide layer on the conductive layer. The conductive oxide layer has an associated work function that is sufficiently close to the work function of the conductive layer that the conductive layer and the conductive oxide layer operate together as the node of the stacked capacitor. The second dielectric layer is removed to define the node of the stacked capacitor. The stacked capacitor may be a metal-insulator-metal (MIM) capacitor and the conductive layer may be formed of a material selected from the group consisting of ruthenium (Ru), tungsten (W) and iridium (Ir). Related structures (devices) are also disclosed.

Claims

1. A method of manufacturing a node of a stacked capacitor, the method comprising:

forming a first dielectric layer having a contact plug therein on an integrated circuit substrate;

forming a second dielectric layer including a storage node hole adjacent the contact plug on the first dielectric layer;

depositing a conductive layer into the storage node hole and on the second dielectric layer, the conductive layer having an associated work function;

oxidizing the conductive layer to form a conductive oxide layer on the conductive layer, the conductive oxide layer having an associated work function that is sufficiently close to the work function of the conductive layer that the conductive layer and the conductive oxide layer operate together as the node of the stacked capacitor; and

removing the second dielectric layer to define the node of the stacked capacitor.

2. The method of claim 1 wherein the stacked capacitor is a metal-insulator-metal (MIM) capacitor and wherein the conductive layer is formed of a material selected from the group consisting of ruthenium (Ru), tungsten (W) and iridium (Ir).

3. The method of claim 2 wherein depositing the conductive layer comprises depositing the conductive layer in a cup shape in the storage node hole and wherein oxidizing the conductive layer comprise forming the conductive oxide layer in the cup shaped conductive layer to substantially fill the storage node hole.

4. The method of claim 2 wherein depositing the conductive layer comprises depositing the conductive layer to substantially fill the storage node hole and wherein oxidizing the conductive layer comprises forming the conductive oxide layer extending from the conductive layer above the storage node hole.

5. The method of claim 2 wherein oxidizing the conductive layer comprises oxidizing the conductive layer at about 140°

C. to about 160°

C. in a plasma atmosphere containing about 4% to about 6% oxygen (O₂) and about 94% to about 96% nitrogen (N₂).

6. The method of claim 5 wherein oxidizing the conductive layer is followed by thermally treating the conductive oxide layer at about 350°

C. to about 450°

C. in an oxygen atmosphere.

7. The method of claim 2 wherein oxidizing the conductive layer is followed by reflowing the conductive layer and the conductive oxide layer.

8. The method of claim 2 wherein the node is a lower electrode of the stacked capacitor and wherein removing the second dielectric layer is followed by:

forming a capacitor dielectric layer on the node of the stacked capacitor; and

depositing a second conductive layer on the capacitor dielectric layer to define an upper electrode of the stacked capacitor.

9. The method of claim 8 wherein depositing the second conductive layer comprises:

depositing a conductive layer on the capacitor dielectric layer; and

oxidizing the conductive layer on the capacitor dielectric layer to form a conductive oxide layer, the conductive layer on the dielectric layer having a work function substantially the same as a work function of the conductive oxide layer on the capacitor dielectric layer so that they operate together as the upper electrode of the capacitor.

10. The method of claim 9 wherein a plurality of lower electrodes are formed on the integrated circuit substrate and wherein the conductive oxide layer on the capacitor dielectric extends between ones of the plurality of lower electrode to define an upper electrode for the ones of the plurality of lower electrodes.

11. A method of manufacturing a node of a stacked capacitor, the method comprising:

forming a first dielectric layer having a contact plug therein on an integrated circuit substrate;

forming a second dielectric layer including a storage node hole adjacent the contact plug on the first dielectric layer;

depositing a conductive layer into the storage node hole and on the second dielectric layer;

oxidizing the conductive layer to form a conductive oxide layer on the conductive layer; and

removing the second dielectric layer to define the node of the stack capacitor including the conductive layer and the conductive oxide layer.

12. The method of claim 11 wherein the conductive oxide layer has an associated work function that is sufficiently close to a work function of the conductive layer that the conductive layer and the conductive oxide layer operate together as the node of the stacked capacitor.

13. The method of claim 12 wherein the stacked capacitor is a metal-insulator-metal (MIM) capacitor and wherein the conductive layer is formed of a material selected from the group consisting of ruthenium (Ru), tungsten (W) and iridium (Ir).

14. A method for fabricating a metal-insulator-metal (MIM) capacitor, the method comprising:

forming a mold oxide layer having a conductive plug on a semiconductor substrate;

etching a predetermined portion of the mold oxide layer to expose the conductive plug so that a lower electrode region is defined;

filling a conductive layer into the lower electrode region of the mold oxide layer;

oxidizing the conductive layer to form a conductive oxide layer to be higher than the mold oxide layer; and

removing the mold oxide layer,

wherein the mold oxide layer has a thickness such that the conductive layer can be fully reclaimed without seams,

the conductive oxide layer is a conductive material that has almost the same work function as the conductive layer, and

the conductive layer is formed of a material selected from the group consisting of ruthenium (Ru), tungsten (W) and iridium (Ir).

15. The method of claim 14, wherein the conductive oxide layer is formed by oxidizing the conductive layer at about 140-160°

C. in a plasma atmosphere containing about 4-6% oxygen (O₂) and about 94-96% nitrogen (N₂).

16. The method of claim 14, wherein, after forming the conductive oxide layer at about 140-160°

C. in a plasma atmosphere containing about 4-6% oxygen (O₂) and about 94-96% nitrogen (N₂), the conductive oxide layer is thermally treated at about 350-450°

C. in an oxygen atmosphere.

17. The method of claim 14, wherein, after the conductive oxide layer is formed, the conductive layer and the conductive oxide layer are reflowed at high temperature.

18. A method for fabricating a metal-insulator-metal (MIM) capacitor, comprising:

forming a plurality of lower electrodes to a predetermined thickness on a semiconductor substrate;

forming a dielectric layer on the plurality of lower electrodes;

forming a conductive layer for an upper electrode on the dielectric layer; and

forming a conductive oxide layer by oxidizing the conductive layer to completely fill a space between ones of the plurality of lower electrodes, thereby forming upper electrode that is made of the conductive layer and the conductive oxide layer,

wherein the conductive oxide layer is a conductive material that has most the same work function as the conductive layer, and

the conductive layer, which constitutes the upper electrode, is formed of a material selected from the group consisting of ruthenium (Ru), tungsten (W) and iridium (Ir).

19. The method of claim 18, wherein the conductive oxide layer is made by oxidizing the conductive layer at about 140-160°

C. in a plasma atmosphere containing about 4-6% oxygen (O₂) and about 94-96% nitrogen (N₂).

20. The method of claim 19, wherein after forming the conductive oxide layer at about 140-160°

C. in a plasma atmosphere containing about 4-6% oxygen (O₂) and about 94-96% nitrogen (N₂), the conductive oxide layer is thermally treated at about 350-450°

C. in an oxygen atmosphere.

21. The method of claim 18, wherein after the conductive oxide layer is formed, the conductive layer and the conductive oxide layer are reflowed at an elevated temperature.