Display module

• US 6,947,019 B2
• Filed: 03/25/2002
• Issued: 09/20/2005
• Est. Priority Date: 03/28/2001
• Status: Expired due to Term

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Hitachi, Ltd.
• Inventors: Mikami, Yoshiro, Ouchi, Takayuki, Kaneko, Yoshiyuki, Sato, Toshihiro
• Primary Examiner(s): Awad, Amr A.
• Application Number:
  US10/103,789
• Publication Number:
  US 20020140645A1
• Time in Patent Office: 1,275 Days
• Field of Search: 345 82- 83, 345 76- 77, 345/90, 315/169.1, 315/169.3, 315/169.4
• US Class Current: 345/82
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

This display module performs a high quality display by preventing the effect resulting from a residual charge of a data signal in the previous scanning remaining in a capacitor of a pixel circuit.

The display module is provided with the pixel circuit having an active element that selects a pixel by a horizontal scanning signal supplied from a scanning line GL every intersection unit of multiple scanning lines GLs arranged in a matrix within a display region AR on a substrate SUB, a data holding element that holds a data signal supplied from the data line by the turn-on of this active element, and an organic light emitting diode OLED that emits light by the current supplied from a current supply line CSL in accordance with the data signal held in the data holding element, and a reset circuit RST that recovers at least either a capacitor CPR or a data line DL of the pixel circuit to an initial condition is provided before data for the pixel that corresponds to the next scanning line is sent to the data line after the scanning of the scanning line before one is finished.

Claims

1. A display module, comprising:

a substrate;

a plurality of scanning line, a plurality of data lines intersecting the plurality of scanning lines, and a current supply line, provided on the substrate respectively; and

a plurality of pixels, provided in a display region on the substrate, each of the plurality of pixels having a first active element activated in accordance with a scanning signal supplied from one of the plurality of scanning lines to acquire a data signal supplied from one of the plurality of data lines, a data holding element for holding the data signal acquired by the first active element, a light emitting device, and a second active element activated in accordance with the data signal held by the data holding element to supply a current from the current supply line to enable the light emitting device to emit light,

wherein the light emitting device includes a first electrode layer coupled to receive the current from the second active element, an organic light emitting layer formed on the first electrode layer, and a second electrode layer formed on the organic light emitting layer, and

wherein a reset circuit is provided in the display module, to recover each of the plurality of data lines to an initial condition thereof before the data signal is supplied therethrough, whenever the acquisition of the data signal from the each of the plurality of data lines by the first active element in response to the scanning signal supplied to respective one of the plurality of scanning lines is completed.

2. The display module according to claim 1, wherein the reset circuit recovers the data holding element holding the data signal acquired by the first active element from the one of the data lines in response to the scanning signal supplied to the one of the scanning lines to an initial condition thereof in a period after the scanning signal is started to be supplied to the one of the scanning lines and before the data signal is supplied to the one of the data lines.

3. The display module according to claim 1, wherein the reset circuit recovers each of the plurality of data lines to the initial condition thereof, whenever the scanning signal is supplied to the respective one of the plurality of scanning lines.

4. The display module according to claim 1, wherein:

a data driving circuit is provided on the substrate, to output the data signal to the each of the plurality of data lines, and

the reset circuit is disposed in a rear stage of the data driving circuit and a front stage of the plurality of data lines.

5. The display module according to claim 1, wherein:

a data driving circuit is provided on the substrate, and is connected to one end of each of the plurality of data lines, to output the data signal to each of the plurality of data lines, and

the reset circuit is disposed at another end of each of the plurality of data lines.

6. The display module according to claim 1, wherein:

a scan driving circuit and a data driving circuit are provided outside of the display region on the substrate, the scan driving circuit being connected to the plurality of scanning lines and the data driving circuit being connected to the plurality of data lines, and

one side of the substrate at which the scan driving circuit is arranged, is adjacent to another side thereof at which the data driving circuit is arranged.