Radio frequency data communications device

• US 6,947,513 B2
• Filed: 03/30/2001
• Issued: 09/20/2005
• Est. Priority Date: 05/13/1996
• Status: Expired due to Fees

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Ovard, David K., Tuttle, John R., Rotzoll, Robert R., Tuttle, Mark E., Higgins, Brian P., Yu, Shu-Sun, O'Toole, James E., Devereaux, Kevin M., Pax, George E., Lowrey, Tyler E.
• Primary Examiner(s): Holloway, III, Edwin C.
• Application Number:
  US09/822,063
• Publication Number:
  US 20030043949A1
• Time in Patent Office: 1,635 Days
• Field of Search: 375/374, 375/141, 375/298, 375/376, 340/10.1, 340/10.4, 327/270, 327/244, 327/168, 331/1.A, 332/128, 332/103, 307/498, 342/42, 342/44, 342/51, 333/17.1
• US Class Current: 375/374
• CPC Class Codes: G06K 19/0707 the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation G06K19/0702 takes precedence
• CPC Class Codes: G06K 19/0712 the arrangement being capable of triggering distinct operating modes or functions dependent on the strength of an energy or interrogation field in the proximity of the record carrier active means for hindering electromagnetic reading or writing G06K19/07336
• CPC Class Codes: G06K 19/0716 at least one of the integrated circuit chips comprising a sensor or an interface to a sensor
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/0726 the arrangement including a circuit for tuning the resonance frequency of an antenna on the record carrier
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07758 arrangements for adhering the record carrier to further objects or living beings, functioning as an identification tag
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: G06K 7/10059 transponder driven
• CPC Class Codes: H01Q 1/2225 used in active tags, i.e. provided with its own power source or in passive tags, i.e. deriving power from RF signal
• CPC Class Codes: H03L 7/0995 the oscillator comprising a ring oscillator
• CPC Class Codes: H03L 7/148 said digital means comprising a counter or a divider

Abstract

A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Claims

1. CMOS transmitter carrier circuitry configured to receive a digital clock signal, the circuitry comprising:

a phase locked loop including a voltage controlled oscillator configured to multiply the frequency of the digital clock signal by a predetermined multiple and control circuitry to maintain a desired frequency, the phase locked loop having an output providing a transmitter carrier, the control circuitry including a first charge pump coupled to a start-up circuit and configured to pump a frequency of the voltage controlled oscillator in response to a start-up command from the start-up circuit, and a second charge pump and configured to selectively pump up or down the frequency of the voltage controlled oscillator in steps smaller than the steps of the first charge pump; and

divider circuitry having an input coupled to the voltage controlled oscillator and receiving the multiplied frequency, the divider circuitry being configured to divide by the predetermined multiple, and the divider circuitry having an output coupled to the control circuitry.

2. CMOS transmitter carrier circuitry in accordance with claim 1, wherein the phase locked loop includes a loop filter coupled to the voltage controlled oscillator, wherein the control circuitry comprises a phase-frequency detector coupled to the divider circuitry output, wherein the phase-frequency detector and the first and second charge pumps are coupled to the voltage controlled oscillator and to the loop filter, and wherein the loop filter is a passive loop filter.

3. CMOS transmitter carrier circuitry in accordance with claim 1, wherein the voltage controlled oscillator has a plurality of outputs that are configured to be angularly spaced apart with respect to phase.

4. CMOS transmitter carrier circuitry in accordance with claim 3, further comprising a frequency doubler that receives at least some of the angularly spaced apart outputs of the voltage controlled oscillator, and that is configured to produce a signal with a frequency that is double the frequency of the outputs of the voltage controlled oscillator.

5. CMOS transmitter carrier circuitry in accordance with claim 4, wherein the frequency doubler comprises first and second Gilbert cells coupled together, a frequency generator configured to apply a first sinusoidal wave to the first Gilbert cell, and a phase shifter coupled between the first and second Gilbert cells to apply to the second Gilbert cell a sinusoidal wave that is shifted from the first sinusoidal wave.

6. CMOS transmitter carrier circuitry in accordance with claim 2, wherein the charge pump comprises:

a first charge pump coupled to a start-up circuit and configured to pump a frequency of the voltage controlled oscillator up in coarse, medium or medium fine steps in response to a start-up command from the start-up circuit; and

a second charge pump coupled to the control circuitry and configured to pump up or down the frequency of the voltage controlled oscillator in fine steps in response to signals from the control circuitry.

7. CMOS transmitter carrier circuitry in accordance with claim 6, wherein the start-up circuit is configured to initially invoke coarse or medium steps to pump up the frequency of the voltage controlled oscillator and is configured to invoke medium fine or fine steps when the start-up circuit determines that the frequency of the voltage controlled oscillator is within a few percent of a desired frequency.

8. A method of manufacturing CMOS transmitter carrier circuitry, the circuitry receiving a digital clock signal, the method comprising:

including in a phase locked loop a voltage controlled oscillator configured to multiply the frequency of the digital clock signal by a predetermined multiple, coupling a loop filter to the voltage controlled oscillator, and coupling a phase-frequency detector and charge pump to the voltage controlled oscillator and to the loop filter to maintain a desired frequency, the phase locked loop having an output providing a transmitter carrier; and

coupling an input of divider circuitry to the voltage controlled oscillator to receive the multiplied frequency, configuring the divider circuitry to divide by the predetermined multiple, and coupling an output of the divider circuitry to the phase-frequency detector.

9. A method of manufacturing CMOS transmitter carrier circuitry in accordance with claim 8, wherein the loop filter is a passive loop filter.

10. A method of manufacturing CMOS transmitter carrier circuitry in accordance with claim 8, wherein the voltage controlled oscillator has a plurality of outputs that are configured to be angularly spaced apart with respect to phase.

11. A method of manufacturing CMOS transmitter carrier circuitry in accordance with claim 10, and further comprising arranging a frequency doubler to receive at least some of the angularly spaced apart outputs of the voltage controlled oscillator, and to produce a signal with a frequency that is double the frequency of the outputs of the voltage controlled oscillator.

12. A method of manufacturing CMOS transmitter carrier circuitry in accordance with claim 11, wherein the frequency doubler comprises first and second Gilbert cells coupled together, a frequency generator configured to apply a first sinusoidal wave to the first Gilbert cell, and a phase shifter coupled between the first and second Gilbert cells to apply to the second Gilbert cell a sinusoidal wave that is shifted from the first sinusoidal wave.

13. A method of manufacturing CMOS transmitter carrier circuitry in accordance with claim 8, wherein the charge pump comprises:

a first charge pump coupled to a start-up circuit and configured to pump a frequency of the voltage controlled oscillator up in coarse, medium or medium fine steps in response to a start-up command from the start-up circuit; and

a second charge pump coupled to the phase-frequency detector and configured to pump up or down the frequency of the voltage controlled oscillator in fine steps in response to signals from the phase-frequency detector.

14. A method of manufacturing CMOS transmitter carrier circuitry in accordance with claim 13, wherein the start-up circuit is configured to initially invoke coarse or medium steps to pump up the frequency of the voltage controlled oscillator and is configured to invoke medium fine or fine steps when the start-up circuit determines that the frequency of the voltage controlled oscillator is within a few percent of a desired frequency.

15. A method of manufacturing a CMOS transmitter configured to receive a digital clock signal, the method comprising:

including in a phase locked loop a voltage controlled oscillator configured to multiply the frequency of the digital clock signal by a predetermined multiple, coupling a phase-frequency detector and charge pump to the voltage controlled oscillator and to a passive loop filter, to maintain a desired frequency, the voltage controlled oscillator having a plurality of outputs that are angularly spaced apart with respect to phase, the phase locked loop having an output providing a transmitter carrier;

coupling an input of the divider circuitry to one of the outputs of the voltage controlled oscillator, the divider circuitry being configured to divide by the predetermined multiple and having an output coupled to the phase-frequency detector; and

coupling a modulator to the phase locked loop to use the transmitter carrier.

16. A CMOS transmitter in accordance with claim 15, wherein the voltage controlled oscillator has outputs that are spaced apart, with respect to phase in 45 degree intervals.

17. A CMOS transmitter in accordance with claim 16, wherein the predetermined multiple is sixteen.

18. A CMOS transmitter in accordance with claim 15, wherein the charge pump comprises:

a first charge pump coupled to a start-up circuit and configured to pump a frequency of the voltage controlled oscillator up in coarse, medium or medium fine steps in response to a start-up command from the start-up circuit; and

a second charge pump coupled to the phase-frequency detector and configured to pump up or down the frequency of the voltage controlled oscillator in fine steps in response to signals from the phase-frequency detector.

19. A method of manufacturing a CMOS transmitter in accordance with claim 18, wherein the start-up circuit is configured to initially invoke coarse or medium steps to pump up the frequency of the voltage controlled oscillator and is configured to invoke medium fine or fine steps when the start-up circuit determines that the frequency of the voltage controlled oscillator is within a few percent of a desired frequency.

20. A method of providing a carrier for wireless communications using an integrated circuit including carrier circuitry, the method comprising:

receiving a digital clock signal with the carrier circuitry, the carrier circuitry being defined by CMOS circuit elements, the carrier circuitry including a phase locked loop having a voltage controlled oscillator, having a loop filter, having a phase-frequency detector, and having a charge pump coupled to the phase-frequency detector and to the loop filter, the voltage controlled oscillator having an output, and the phase locked loop having an output providing a transmitter carrier;

multiplying the frequency of the digital clock signal by a predetermined multiple using the voltage controlled oscillator;

receiving the digital clock signal with the phase-frequency detector and comparing the frequency and phase of the digital clock signal with a second signal and issuing pump up or pump down signals in response to the comparison,

maintaining a desired frequency in response to the pump up and pump down signals using the charge pump, the charge pump receiving the pump up and pump down signals and producing an output having a voltage that varies in response to the pump up and pump down signals; and

dividing by the predetermined multiple using divider circuitry having an input coupled to the output of the voltage controlled oscillator, the divider circuitry having an output defining a second signal coupled to the phase-frequency detector.

21. A method of providing a carrier for wireless communications in accordance with claim 20, wherein the frequency of the output of the voltage controlled oscillator is configured to vary depending on a voltage provided by the loop filter to the voltage controlled oscillator.

22. A method of providing a carrier for wireless communications in accordance with claim 21, and comprising filtering the output of the charge pump using the loop filter.

23. A method of providing a carrier for wireless communications in accordance with claim 20 wherein the predetermined multiple is sixteen.

24. A method of providing a carrier for wireless communications in accordance with claim 20, further comprising:

pumping up a frequency of the voltage controlled oscillator up in coarse, medium or medium fine steps in response to a start-up command from a start-up circuit, using a first charge pump coupled to the start-up circuit; and

pumping up or down the frequency of the voltage controlled oscillator in fine steps, using a second charge pump coupled to the phase-frequency detector, in response to signals from the phase-frequency detector.

25. A method of providing a carrier for wireless communications in accordance with claim 24, wherein the start-up circuit is configured to initially invoke coarse or medium steps to pump up the frequency of the voltage controlled oscillator and is configured to invoke medium fine or fine steps when the start-up circuit determines that the frequency of the voltage controlled oscillator is within a few percent of a desired frequency.

26. A method of providing a carrier for wireless communications, the method comprising:

receiving a digital clock signal using carrier circuitry, the carrier circuitry being defined by CMOS circuit elements;

multiplying the frequency of the digital clock signal by a predetermined multiple using a phase locked loop including a voltage controlled oscillator, a passive loop filter, a phase-frequency detector, and a charge pump coupled to the phase-frequency detector, to the voltage controlled oscillator, and to the loop filter to maintain a desired frequency in response to the pump up and pump down signals, the voltage controlled oscillator having a plurality of outputs that are angularly spaced apart with respect to phase, the phase locked loop having an output providing a transmitter carrier;

receiving the digital clock signal with the phase-frequency detector and comparing the frequency and phase of the digital clock signal with a second signal and issuing pump up or pump down signals in response to the comparison and

dividing by the predetermined multiple using divider circuitry having an input coupled to one of the outputs of the voltage controlled oscillator and having an output defining the second signal coupled to the phase-frequency detector.

27. A method of providing a carrier for wireless communications in accordance with claim 26 wherein the predetermined multiple is sixteen.

28. A method of providing a carrier for wireless communications in accordance with claim 27 and further comprising receiving, using a frequency doubler, at least some of the angularly spaced apart outputs of the voltage controlled oscillator, and producing, using the frequency doubler, a signal with a frequency that is double the frequency of the outputs of the voltage controlled oscillator.

29. A method of providing a carrier for wireless communications in accordance with claim 28 and further comprising producing a signal, using a second frequency doubler coupled to the first mentioned frequency doubler, with a frequency that is double the frequency of the signal produced by the first frequency doubler.

30. A method of providing a carrier for wireless communications in accordance with claim 28 and further comprising receiving at least some of the angularly spaced apart outputs of the voltage controlled oscillator with a first frequency doubler stage including a first frequency doubler that is configured to produce a signal with a frequency that is double the frequency of the outputs of the voltage controlled oscillator, and receiving other of the angularly spaced apart outputs of the voltage controlled oscillator with a second frequency doubler, of the first frequency doubler state, that is configured to produce a signal with a frequency that is double the frequency of the outputs of the voltage controlled oscillator.

31. A method of providing a carrier for wireless communications in accordance with claim 30 and further comprising producing a signal with a frequency that is double the frequency of the signals produced by the first frequency doubler stage using a second frequency doubler stage coupled to the first frequency doubler stage.

32. A method of providing a carrier for wireless communications in accordance with claim 27, wherein the charge pump includes a first charge pump coupled to a start-up circuit and a second charge pump coupled to the phase-frequency detector, the method further comprising:

pumping up a frequency of the voltage controlled oscillator up in coarse, medium or medium fine steps, in response to a start-up command from the start-up circuit, using the first charge pump; and

pumping up or down the frequency of the voltage controlled oscillator in fine steps, in response to signals from the phase-frequency detector, using a the second charge pump.

33. A method of providing a carrier for wireless communications in accordance with claim 32, wherein the start-up circuit is configured to initially invoke coarse or medium steps to pump up the frequency of the voltage controlled oscillator and is configured to invoke medium fine or fine steps when the start-up circuit determines that the frequency of the voltage controlled oscillator is within a few percent of a desired frequency.

34. A method of manufacturing an integrated circuit including a transmitter for wireless communications, the transmitter configured to receive a digital clock signal, the transmitter being defined by CMOS circuit elements, the method comprising:

including in a phase locked loop a voltage controlled oscillator to multiply the frequency of the digital clock signal by a predetermined multiple, a passive loop filter, a phase-frequency detector to receive the digital clock signal and compare the frequency and phase of the digital clock signal with a second signal and to issue pump up or pump down signals in response to the comparison, and coupling a charge pump to the phase-frequency detector, the voltage controlled oscillator and to the loop filter to maintain a desired frequency in response to the pump up and pump down signals, the voltage controlled oscillator having a plurality of outputs that are angularly spaced apart with respect to phase, the phase locked loop having an output providing a transmitter carrier;

coupling the input of divider circuitry to one of the outputs of the voltage controlled oscillator, the divider circuitry dividing by the predetermined multiple and having an output defining the second signal coupled to the phase-frequency detector; and

coupling a modulator to the voltage controlled oscillator.

36. A method of manufacturing an integrated circuit in accordance with claim 34 and comprising:

coupling the first charge pump to a start-up circuit to pump up a frequency of the voltage controlled oscillator in coarse, medium or medium fine steps in response to a start-up command from the start-up circuit; and

coupling a second charge pump to the phase-frequency detector to pump up or down the frequency of the voltage controlled oscillator in fine steps in response to signals from the phase-frequency detector.

37. A method of manufacturing an integrated circuit in accordance with claim 36, wherein the start-up circuit is configured to initially invoke coarse or medium steps to pump up the frequency of the voltage controlled oscillator and is configured to invoke medium fine or fine steps when the start-up circuit determines that the frequency of the voltage controlled oscillator is within a few percent of a desired frequency.

35. A method of manufacturing an integrated circuit in accordance with 34, wherein the voltage controlled oscillator includes a plurality of stages, one of the stages including a first transistor having a control electrode defining a first input, and first and second power electrodes, wherein the first power electrode defines a first node, wherein the stage further includes a second transistor having a control electrode defining a second input, and having first and second power electrodes, wherein the first power electrode of the second transistor defines a second node, wherein the stage further includes a current source connected to the second power electrodes of the first and second transistors, the current source being configured to direct current away from the second power electrodes of the first and second transistors, and wherein the stage further includes a variable resistance configured to couple the first and second nodes to a supply voltage.